Electronic Design

Software Squeezes The Most From IC Wire-Bond Designs

A recently developed software tool automatically checks for design-rule violations as locations are designated for wire bonds between die and package lead frames. Known as the Post-Layout Bond Tool, it was initially developed by Knights Technology of Sunnyvale, Calif., for engineers at Infineon Technologies in Munich, Germany.

Besides checking for design-rule errors, the software also generates a report that assesses the fit of each wire bond with respect to the geometric constraints of a package. It produces a wire-bond diagram and provides coordinates for driving wire bonders as well. Additionally, it can be used in the pre-layout mode to enable bond planning and feasibility studies with respect to assembly at an early stage of a chip design project, before actual chip floorplanning has been performed. The result, Knights Technology claims, is a single-pass, ready-for-production IC package design.

According to Werner Schiele, CAD manager at Infineon, the tool solved an increasingly difficult problem for the IC maker. "We had developed a library of over 500 different chip packages. As the number of packages increased, and with it, the number of different types of wire-bond checks, we needed to automate the bond-generation and verification pro-cess," he says.

The Post-Layout Bond Tool addresses this by checking against Infineon's embedded design rules online as the connections between a chip and a particular lead frame are defined.

Many IC manufacturers have similarly extensive libraries of package CAD data and associated design rules. Those proprietary rules may not readily transfer to commercial, off-the-shelf CAD packages for wire-bond placement that perform automatic rule checks. The process of manually verifying that each wire-bond placement between a die and lead frame does not violate a design rule is extremely tedious. It also can be inaccurate.

Developed in Java and configured to run on Sun Solaris and PC platforms, the tool performs a number of design-rule checks. It looks for shorted wires and incorrectly placed wires. Also, it checks the angle between wires and examines wire length. It additionally in-spects the distance from the edge of a chip to the package.

For more information about Knights Technology's software development services, call (408) 528-3000 or go to www.knights.com.

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TAGS: Components
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