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Digital signal processing brings DSPs (digital signal processors) to mind. The DSP algorithms need I/O so they tend to be surrounded by analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). Microcontrollers often handle DSP chores and often include DSP instructions. Microcontrollers also have ADCs and DACs on-chip.
The trend in microcontrollers is to allow peripherals to operate when the processor is in one or more sleep modes. This reduces power requirements as the peripheral controller uses much less than the processing core or cores. Many sensor or data-logging applications can use significantly less power if the processor only runs when sufficient data has been obtained.
Microcontrollers have supported this power-down regimen almost since their inception, but the approach was usually very simple. For example, comparators are often used for checking error conditions when a threshold is reached. This is akin to a digital input that can wake up the processor when a switch closes. Both are very useful, but very limited.
More robust platforms allow ADCs to capture data before they wake up the processor and some can even be linked to a DMA controller so information is saved in memory without alerting the processor. The latter normally occurs once a specified number of samples is available. Likewise for DACs, a DMA and a timer can be combined to deliver analog outputs over time.
Many of the latest microcontrollers have the capability to programmatically link peripherals together to implement more complex operations. They allow the outputs of one device to be used by another instead of the processor. The processor normally gets involved in configuration and processing data at the end of the chain.
These combinations have normally been done using conventional peripherals with additional linkages between them. Cypress Semiconductor’s PSoC series actually has configurable digital and analog peripherals. This provides flexibility similar to FPGAs, but with simpler, albeit more limited, configuration.
The PSoC tends to be the exception in microcontroller architectures, but the trend toward more functionality is clear. More intelligent or flexible peripherals are being incorporated into microcontrollers. Microchip’s PIC16F18877 incorporates a 10-bit ADC with integrated computation support (Fig. 1). The computation support can handle chores like accumulation and averaging as well as doing low-pass filter calculations in hardware. This support is in addition to the Core-Independent Peripherals (CIPs) from Microchip that provide the linkage between peripherals.
These types of features can provide significant power savings for Internet of Things (IoT) applications where low power and long battery life are important. Often the sensors employed need constant monitoring, but only need analysis or communication by an application running on the processor at infrequent intervals. The added intelligence allows an IoT platform to be more powerful, but use little power since the processor is idle most of the time. Likewise, this approach can be used to build an IoT solution around a less powerful processor because the hardware is doing the heavy lifting when it comes to analog data.
Low-end systems are not the only place where peripherals are gaining more intelligence. Texas Instruments’ 66AK2L06 Keystone family has a software-configurable digital front end (DFE) that can often replace an FPGA (Fig. 2). The Keystone system-on-chip (SoC) platforms target high-performance systems needing digital down-conversion (DDC) and digital up-conversion (DUC). The DFE also has programmable FIR filters.
These types of high-end solutions are often delivered to provide more power efficient implementations that are running continuously rather than the normally off IoT solutions. Implementations like Keystone offload the processor while eliminating the need for hardware-based processing implemented in an FPGA or a higher-performance processor to handle the data processing chores.
Moving algorithms into hardware has always been a successful approach to improving performance, reducing costs and minimizing power requirements. This is likely to continue in the signal processing space.