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Synchronous SRAM Modules Support Quad Word Accesses

Densities of 512 kbytes to 2 Mbytes are available in a family of synchronous/synchronous burst, flow-through SRAM modules that support quad word accesses and low-power sleep mode. The 3.3V modules come in SO-DIMM format and are available with clock-to-data access times of 9, 10 and 12 ns.The modules' architecture is defined as multi-banked synchronous burst flow-through, which reduces propagation delays at address boundaries caused by address mapping schemes. The burst-mode feature provides gains in data transfer rates. Quad word access is offered in both read and write operations. A sleep-mode-per-bank option reduces total module power consumption. The 1- and 2-Mbyte modules are organized as 2 x 64k x 72 (EDI2CG27264V) and 2 x 128k x 72 (EDI2CG272128V), with the 512-kbyte version available on request.


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TAGS: Digital ICs
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