Texas Instruments (TI) has introduced the 66AK2L06 Keystone family with a software-configurable digital front end (DFE) that can often replace the FPGA that sits between the host and the analog front end (Fig. 1). It can handle as many as 12 up and 12 down channels.
Often an FPGA is required to handle conversion at high data rates that can easily overwhelm a software-only solution. TI’s software-configurable DFE still does the work in hardware, but it has developed a complex that handles the majority of use cases.
The DFE includes digital down-converters (DDC) and digital up-converters (DUC) plus programmable FIR filters. There is a programmable front-end automatic gain control (AGC) and numerically controlled oscillator (NCO) with a mixer. The system supports real and complex IO. The connection to the analog front end is via JESD204B.
Overall, the system can reduce power consumption by 60% compared to an FPGA solution. It helps companies get to market sooner since there is no need for FPGA design.
The DFE is only part of the story. The 66AK2L06 SoC also includes a pair of ARM Cortex-A15 cores and up to four C66x DSP cores. These share 8 Mbytes of LS and L3 cache. A number of hardware AccelerationPac modules are included in addition to the DFE. This includes FFT support, network packet support, and on-chip security.
TI provides software tools, including a configuration application for the DFE and an RF/DFE SDK Software Development Kit (RFSDK). This includes libraries and API support to manage the DFE. TI’s Multicore Software Development Kit includes platform-specific drivers for the ARM and DSP cores.
The TI EVM – XEVMK2LX is a development board and software built around the 66AK2L06. It includes Code Composer Studio version 5 support as well as a board-support page, EVM boot loader package, Chip Support Library, and Network Development Kit.