EE Product News

RISC MPUs Fabbed Using 90-nm Process

Taking center stage as the first such devices to tap 90-nm CMOS technology, the 32-bit TMPR4955CFG-400 and 64-bit TMPR4956CXBG-400 members of the TX49 family of MIPS-based, RISC microprocessors (MPUs) operate at a maximum frequency of 400 MHz and dissipate 600 mW of power. Both MPUs incorporate a four-way set-associative cache memory consisting of 32 KB of instruction and 32 KB of data cache. They also integrate a floating-point unit that is separate from the integer logic unit, allowing independent performance of integer and floating-point operations. Additionally, the CPU core contains a debugging support unit and communicates via an external, enhanced JTAG (EJTAG) interface to perform execution control. The new MPUs are scheduled to become available in August, with samples of TMPR4955CFG-400 and TMPR4956CXBG-400 expected to cost $35 and $45 each/100, respectively. TOSHIBA AMERICA ELECTRONIC COMPONENTS INC., Irvine, CA. (800) 879-4963.


Product URL: Click here for more information

TAGS: Digital ICs
Hide comments


  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.