For example, Anritsu Co. recently introduced a PAM4 error detector (ED) supporting 116-Gb/s bit error rate tests for its Signal Quality Analyzer-R MP1900A Series. “With the new module installed, the MP1900A is the only instrument to achieve error-free measurement of PAM4 signals at 116 Gb/s with industry-best-operation bit rates and high Rx sensitivity performance,” said Hiroshi Goto, business development manager at Anritsu. “Combined with the previously released MP1900A Series PAM4 pattern generator that supports high-accuracy BER measurements of PAM4 signals, the BERT allows engineers to accurately evaluate bit error rates of 400 GbE/800 GbE communications equipment and devices.”

The MP1900A will be on exhibit at DesignCon 2020 in January in Santa Clara. “It is a bit-error-rate tester for communications speeds of 400G and faster, supporting high-speed signal generation and signal performance analysis,” Goto said. “We will highlight the built-in high-bandwidth and high-input-sensitivity Rx circuit and the new PAM4 ED MU196040B module that supports error-free measurement of 100-Gb/s PAM4 input signals even at a low input amplitude of just 36 mV (typical).”

For its part, Rohde & Schwarz has recently introduced the R&S RTP 16-GHz real-time oscilloscope, which the company will highlight at DesignCon, according to Randy White, strategic oscilloscope planner at Rohde & Schwarz. He also cited other recently launched products for high-speed digital test, including the R&S RTP-B7 differential pulse source (for TDR) as well as the R&S RTP-K121 real-time de-embedding option and R&S RTP-K130 TDR/TDT analysis option.

Keysight Technologies recently introduced a DDR5 solution that integrates software and hardware across the entire customer workflow from design through validation, according to Brig Asay, director, strategic planning, high-speed digital solutions, at Keysight. “We also introduced our new USB 4.0 Tx solution,” he added. “Keysight also has a new probing system to make probing a DDR5 signal possible.” At DesignCon, “We will highlight several products designed to test next-generation high-speed digital devices” Asay said. “This includes a full suite of testing solutions for DDR5, PCIe Gen5 Tx/Rx testing, USB 4.0 Tx, integrated forward error correction (FEC) debug and analysis, a fast error detector, and a phase-noise analysis tool.”

According to Trevor Smith, T&M business development manager at Pico Technology Ltd., “Our most recent product introduction for engineers doing high-speed digital communications design is the PicoScope 9404-16, which is a 4-channel, 16-GHz Sampler Extended Real-Time (“SXRTO”) PC-based oscilloscope.” That product will be featured at DesignCon “…along with other high-performance test and verification tools such as the AS108 8-GHz agile synthesizer/generator and the popular PicoVNA 106 vector network analyzer that is being widely used for characterization of high-speed serial-data channels,” Smith said.

Matt Burns, product marketing manager, high-speed, at Samtec, commented that at DesignCon 2020, Samtec will launch the new 70-GHz Bulls Eye high-performance test system.

Teledyne LeCroy has introduced several products recently with applicability to high-speed digital test, according to Hilary Lustig, marketing communications manager. Those include the SierraNet M648 protocol analysis and traffic impairment system, which offers protocol analysis and jamming for PAM4 50G Ethernet and 64G Fibre Channel interconnections.

In addition, the company has announced support for the Gen-Z protocol on the Summit M5x protocol analyzer and jammer system and the availability of USB 3.2 analysis in the Voyager M4x analyzer. Lustig said the Voyager M4x started shipping in early 2019 as the industry’s first test solution supporting USB 4 and Thunderbolt 3 protocol analysis. It now supports USB 3.2 to allow testing of systems that utilize dual 10-Gb/s links or 20-Gb/s aggregate bandwidth over USB Type-C cables.

Teledyne LeCroy has also recently announced Summit PCIe protocol analyzers for the next-generation PCIe 5.0 specification and the WavePulser 40iX high-speed interconnect analyzer for interconnect testing and validation. Lustig said that at DesignCon 2020, the company will present live demonstrations and best measurement practices for PCI Express, USB, DisplayPort, power integrity, and more.

EE-Evaluation Engineering asked several industry experts to weigh in on various aspects of high-speed digital test. Read on to see what they had to say.

Unique features

What is unique about your solutions?

White, Rohde & Schwarz: The R&S RTP high-performance oscilloscope combines superior front-end signal integrity with fast acquisition and analysis. This fast performance comes from hardware-accelerated signal processing that enables a combined digital trigger, 16-Gb/s clock-data recovery, de-embedding, and many other signal-integrity analysis features.

Goto, Anritsu: With the 116-Gb/s PAM4 ED, the MP1900A has industry-best high input sensitivity of 36 mV (typical at 53.125 Gbaud) that supports more accurate evaluations up to 116-Gb/s PAM4. The MP1900A also has built-in clock-recovery and equalizer functions that eliminate the need for external equipment and components for faster testing and debugging. By doing so, it simplifies the previously difficult PAM4 error troubleshooting measurements.

Asay, Keysight: In today’s high-speed digital market, designers must get to market as fast as possible. Keysight was first to market to enable our customers in developing solutions for PCI Express Gen5, DDR5, USB 4.0, error detection, and forward error correction. As part of our PCI Express Gen5 Rx calibration software, we offer the UXR with industry-leading noise performance, which allows for more stressing of a device than any other solution. For our DDR5 solutions, we are the only company to offer full integration from design through validation, increasing the ease of use of our solutions. Finally, with our PathWave 2.0 solution, we provide deep analytics and visualization for any design.

Smith, Pico Technology: All Pico test-and-measurement products are PC-based, meaning that they take advantage of the latest advances in PC processing performance and display capabilities, such as 4K UHD monitors.

Burns, Samtec: OEMs want a complete solution for their technical challenges. Samtec offers a comprehensive interconnect portfolio and SI expertise at bleeding-edge data rates answering the needs of next-gen system design.

Samtec's the Bulls Eye high-performance test system has many key features and benefits crucial to system design. Bulls Eye offers a compression interface to the board to provide easy on/off and eliminate soldering costs, a small footprint design, microstrip or stripline PCB transmission, support for 1.85/2.40/2.92-mm jack/plug options on End 2, and phase-match pairs for differential signals

Key challenges

What key challenges do your customers face in the design and test of high-speed serial interfaces and communications links, and how do your solutions help them solve their problems?

White, Rohde & Schwarz: One challenge that we have observed with the customers we work with is the increasing complexity of high-speed interfaces as they are adopted into mainstream or nontraditional applications. For example, 4K video is becoming standard for new automotive designs. The bandwidth requirements to support this resolution force some automotive companies to implement higher speed technologies such as PCI Express or Ethernet. Another example is increasing bandwidth for radar digital backend processing systems. Wider bandwidth antenna arrays need higher throughput to allow for real-time processing. This might necessitate the move to an even higher speed serial interface.

Mainstream designers who are moving to higher speed links still need to address system-level issues like power-supply noise, EMI or common-mode voltage, high bit-error rates, or even battery life (if applicable). The R&S RTP real-time oscilloscope provides enough bandwidth to accurately measure many of today’s high-speed technologies but also includes a flexible suite of signal-integrity debug tools.

Goto, Anritsu: Next-generation data centers are developing 100-Gb/s per single-lane transmission technology for commercial deployment of 400 GbE services, resulting in increased demand for 53.125-Gbaud 4- and 8-lane PAM4 BER tests to evaluate 400-Gb/s and future 800-Gb/s PAM4 transceivers and devices.

Since the PAM4 method representing data with four amplitude levels has gaps between signal levels one-third that of the 2-level NRZ approach, measuring instruments for evaluating signal quality must have much higher input sensitivity performance. The MP1900A has industry-best high sensitivity input of 36 mV (typical at 53.125 Gbaud). In addition to fast speeds, the impact of transmission-path losses in printed circuit boards, cables, components, and similar devices on measurement results cannot be ignored.

Evaluating the genuine performance of the measured DUT not only requires excellent fundamental performance, such as sensitivity and bandwidth, but also a highly integrated solution with functions such as clock recovery and an equalizer for correcting loss effects. To meet these needs, Anritsu has developed the new ED with built-in clock recovery and equalizer to implement a PAM4 BER measuring instrument with market-leading high performance.

Asay, Keysight: This isn’t different than what you will see from a lot of the T&M vendors, but today’s HSD designers and integrators are under severe pressure to get products to market fast and to move to faster and faster speeds. Faster speeds mean shrinking design margins, putting further pressure on engineers. With Keysight solutions, we focus our products to help companies get their products to market as fast as possible. Our solutions offer superior signal integrity, so validation engineers are truly seeing their device performance as opposed to the noise of the instruments. We strive to be first to market with full automation of solutions, so designers and validation engineers can focus on their designs and automating their test systems.

Smith, Pico Technology: Above 1 Gb/s, “the channel is the problem,” so engineers need to understand, model, and verify the characteristics of channel design on high-speed systems. Signal-integrity issues become increasingly severe at high speeds, so we’re trying to address that with affordable tools to verify signal-path simulations and real-world communications—all of that within a realistic equipment budget.

Burns, Samtec: Most IC/connector evaluation boards feature a number of discrete SMAs that high-performance signals route to for connectivity to test equipment. The Bulls Eye high-performance test system improves density 4:1 over discrete SMAs and enables smaller evaluation boards with shorter trace lengths.

Digital communications standards

Are any emerging digital communications standards presenting significant test-and-measurement challenges that you can help your customers address?

Asay, Keysight: There are a couple of unique problems that we help to solve. First, for DDR5, the eyes are fully closed, which has never happened in a memory before—meaning that for the first time, equalization must be utilized to open the eye. Once equalization is used, then it must be “tuned” to find the optimal equalization setting for the receiver. We provide a fully automated Rx calibration system for DDR5. While PCI Express Gen6 is just beginning, it will represent the first time many of today’s high-speed digital engineers use PAM4 signaling. We offer a full suite of tools aimed at PAM4 for both the receiver and the transmitter. Finally, as the world moves to 800-Gb/s signaling, the baud rates are moving above 100 Gbaud. This is fast. Designers need a way to see how good their device is doing under these circumstances. Keysight is the only vendor to provide error detection above 100 Gbaud.

Smith, Pico Technology: Emerging standards are always more challenging to implement that the previous ones! Digital designers are increasingly using tools that were previously the preserve of RF and microwave engineers to get the job done. The best example is the use of a vector network analyzer for channel characterization with S-parameter measurements. Previously they were using exclusively time-domain tools such as a TDR. VNAs have higher dynamic range of 118 dB or more, which is important for low-voltage transmission standards that have very tight noise margins.

Key trends

What key trends in high-speed digital test have you seen over the past year, and what trends do you expect to see in 2020?

Asay, Keysight: The biggest trend was move to Gen5 for PCI Express and DDR. As we move into 2020, USB will become the focus again as USB 4.0 begins to take over. As you look beyond 2020, PAM4 begins to enter the HSD test area. From the testing side, we are seeing a trend to speed up the test automation. This is critical given the need for companies to get to market faster.

Smith, Pico Technology: The past year has thrown up a few new challenges with applications that demand deep understanding of timing and phase-noise characteristics. The 9404 SXRTO’s address that with a full suite of automated measurements with statistics.