Ethernet Chip Packs Hardwired TCP/IP Core And PHY

    May 3, 2007
    The iEthernet W5100, a 10/100 Ethernet controller, includes a hardwired TCP/IP core as well as a PHY interface. Based on the W3150A TCP/IP stack, which contains a future-proofed 10/100 Ethernet MAC, the W5100 allows users to off-load the burden of the

    The iEthernet W5100, a 10/100 Ethernet controller, includes a hardwired TCP/IP core as well as a PHY interface. Based on the W3150A TCP/IP stack, which contains a future-proofed 10/100 Ethernet MAC, the W5100 allows users to off-load the burden of the TCP/IP stack into a second peripheral chip with few peripheral components. The hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP, and PPPoE. Other features include indirect bus addressing and an SPI. Designed by WIZnet, the W5100 is available now, priced at $5.20 each/2,000. SAELIG CO., Pittsford, NY. (888) 772-3544.

    Company: SAELIG CO.

    Product URL: Click here for more information

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