Clock Generator Solves Most Nightmares

Dec. 5, 2008

The Si5338 from Silicon Laboratories provides up to four separate clock outputs, each at an independent frequency, with any common output voltage format. Designers can use it to time four different circuits such as embedded processors, FPGAs, ASICs, memor

Lou Frenzel

Every electronic product needs a clock. Some simple embedded controller products only need a single crystal oscillator. Yet more and more, complex digital equipment requires multiple precision clock frequencies to function. Communications equipment such as telecom access, Ethernet switches and routers, broadcast video, storage networks, and optical networks can require three or more clock frequencies.

Typically, multiple crystal oscillators fit the bill. But now, a single Si5338 from Silicon Laboratories can replace all of those devices. The device provides up to four separate clock outputs, each at an independent frequency, with any common output voltage format. Designers can use it to time four different circuits such as embedded processors, FPGAs, ASICs, memory chips, or physical-layer (PHY) chips.

The Si5338 is a phase-locked loop (PLL) with multiple divider circuits that can be programmed to any frequency. The input is either an 8- to 30-MHz crystal or a 5- to 700-MHz reference clock. The MultiSynthN dividers are SiLabs’ unique patented design fractional-N divider with a phase error calculator and phase adjustment circuit. These components are programmed through the I²C serial interface and other control lines. Possible combinations allow designers to select virtually any frequency from 0.16 to 350 MHz, 367 to 466 MHz, and 550 to 700 MHz. The jitter spec is 1 ps RMS or less.

Furthermore, the Si5338 can provide a specific output voltage and format without external level translator ICs. Designers can use single-ended input to differential, differential to single-ended, or differential to differential. Also, designers can employ a clock input from CMOS, SSTL, HSTL, LVDS, LVPECL, or HCSL and select any of those formats for outputs with supply voltages of 1.98, 2.5, or 3.3 V.

The device can implement frequency margining without additional oscillators or other circuitry as well. Most engineers typically build in frequency margining circuits to facilitate the logic testing to ensure no glitches or timing errors occur with slightly off-frequency clock signals. With the Si5338, you just program in the frequency changes you want on each output. The step size of the change can range from 1 kHz up to 10 MHz.

There are eight models in the Si5338 family. Some of the variants are pin programmable, or you can order them preprogrammed by Silicon Labs. Two of the products are clock buffers, both 1:4 and 1:8 models. The devices all come in a 24-pin, 4- by 4-mm quad flat no-lead (QFN) package. Prices start at $9.31 in 10,000-unit quantities.

Silicon Laboratories Inc.

www.silabs.com

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About the Author

Lou Frenzel | Technical Contributing Editor

Lou Frenzel is a Contributing Technology Editor for Electronic Design Magazine where he writes articles and the blog Communique and other online material on the wireless, networking, and communications sectors. Lou interviews executives and engineers, attends conferences, and researches multiple areas. Lou has been writing in some capacity for ED since 2000.

Lou has 25+ years experience in the electronics industry as an engineer and manager. He has held VP level positions with Heathkit, McGraw Hill, and has 9 years of college teaching experience. Lou holds a bachelor’s degree from the University of Houston and a master’s degree from the University of Maryland. He is author of 28 books on computer and electronic subjects and lives in Bulverde, TX with his wife Joan. His website is www.loufrenzel.com.