Single-Chip SAR Operates At 622 Mbps

March 1, 2000
Reducing total cost of ownership for high-speed networking systems is made possible with the SAR622, a 622-Mbps segmentation and reassembly (SAR) chip with a standard 64-bit data/FIFO bus that supports the UTOPIA multi-PHY interface. The IC is also

Reducing total cost of ownership for high-speed networking systems is made possible with the SAR622, a 622-Mbps segmentation and reassembly (SAR) chip with a standard 64-bit data/FIFO bus that supports the UTOPIA multi-PHY interface. The IC is also claimed as the first standard SAR device to operate at the full wire speed of 622 Mbps. System implementation is said to be easier with separate data and control buses, as well as because the chip incorporates both 64-bit data FIFO and PCI processor bus interfaces. The device minimizes the software development effort, thereby reducing the total cost of ownership of high-speed networking systems. Targeted applications include multi-service switches, access switches and multi-service WAN switches. The device enables the conversion of data streams from voice, video and data to ATM cells, providing Quality of Service transport over SONET. Pricing is $164 each/1000.

Company: OKI SEMICONDUCTOR

Product URL: Click here for more information

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