DynaNIC Software Eases SmartNIC Development

Dec. 6, 2023

BrnoLogic's complete SmartNIC software solution offloads developers from having to wrangle with hardware.

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This video is part of the TechXchange: SmartNIC Accelerating the Smart Data Center.

SmartNICs are designed to provide efficient, low-latency processing of network traffic to offload host processors. Many SmartNICs employ FPGAs to handle this type of work. However, programming an FPGA is no easy task, and neither is configuring a SmartNIC.

I talked with BrnoLogic’s CTO, Lukas Kekely, about the new DynaNIC solution, which works on platforms from companies like AMD, BittWare, napa:tech, Prodesign, Reflex CES, and Silicom (Fig. 1). DynaNIC is designed for developers who want to deal with software while BrnoLogic handles the hardware.

1. DynaNIC, a combination of FPGA firmware and software, provides packet processing for standard SmartNIC platforms.

DynaNIC can be configured to manage the entire data flow, from the incoming SerDes to the outgoing interface (Fig. 2).

2. The software solution supplies all of the function blocks, from packet parsing to filtering. (BrnoLogic)

The platform can handle write speeds up to 400 Gb/s. It utilizes the Data Plane Development Kit (DPDK) API that’s the de facto standard for SmartNICs. All of the FPGA configuration and support is taken care of, allowing developers to work at the software level to configure and access the SmartNIC.

DynaNIC can be configured to extract data from anywhere in the flow (Fig. 3). The FPGA pipeline supports the open-source RTE Flow API from DPDK. It’s easy to set up header field extraction and parsing. The modular architecture works with raw processing speeds from 100 Gb/s to 1 Tb/s, depending on the hardware.

3. DynaNIC can be configured to extract data from anywhere in the flow.

The SmartNIC solution can be used to implement IDS/IPS services, firewalls, and anti-DDoS solutions in addition to routing and switching. Multiple, reusable blocks can be configured to handle different stream processing requirements.

Check out more of our content in the TechXchange: SmartNIC Accelerating the Smart Data Center.

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.

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I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.

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