During processing, a video sync signal will occasionally become compressed.
This circuit, essentially made up of Q1, Q2, and Q3, comprises a video amplifier
and sync stretch circuit (see the
During processing, a video sync signal will occasionally become compressed.
This circuit, essentially made up of Q1, Q2, and Q3, comprises a video amplifier
and sync stretch circuit (see the figure).
Q4 is an emitter follower that interfaces with following circuits.
Q1 sync strips the incoming video at a level determined by R9. The incoming
video is amplified and mixed with the stripped sync in Q2. Q3 provides inversion
and video amplitude control via R15.
It may be appropriate in some circuits to provide a degree of high-frequency
equalization through a small-value capacitor (Ceq), as shown in the
figure, depending upon circuit layout.
In the setup, the sync level control (R9) and the video level control
(R15) are used to set the ratio of sync to the video desired. They
also set the output video at 1 V p-p.
