Clock Driver Controls Internal Edge Rate

Oct. 1, 1998
Designed with internal edge-rate control and process, voltage and temperature compensated, GTLP6C816 clock driver helps designers achieve incident wave switching and improved signal integrity for high-performance backplanes. Designed for low skew

Designed with internal edge-rate control and process, voltage and temperature compensated, GTLP6C816 clock driver helps designers achieve incident wave switching and improved signal integrity for high-performance backplanes. Designed for low skew clock distribution applications, the device is well-suited for use in high-performance backplanes used for datacomm, telecomm, server, and RAID systems. GTLP6C816 offers bidirectional TTL to GTLP signal level translation and provides high-speed interface between cards operating at TTL voltage levels and a backplane operating at GTLP voltage levels. The edge rate is controlled to minimize noise on the GTLP port. The device also has a 1:6 fanout clock driver for the TTL port, a 1:2 fanout clock driver for the GTLP port and TTL compatible driver and control outputs.

Company: FAIRCHILD SEMICONDUCTOR

Product URL: Click here for more information

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