Oscillator Taps PECL Logic To Help It Drive Jitter Down

Feb. 1, 2002
By combining speedy PECL logic and differential clock signal transmission, Model M2980 clock oscillator achieves ultra low jitter to 210 MHz, qualifying the device as a frequency reference for ATM, SONET and other applications. The oscillator holds

By combining speedy PECL logic and differential clock signal transmission, Model M2980 clock oscillator achieves ultra low jitter to 210 MHz, qualifying the device as a frequency reference for ATM, SONET and other applications. The oscillator holds jitter to less than 10 psRMS, 5 ps typical, and provides a 45/55 waveform symmetry.Typical rise and fall times are 225 ps and frequency stability is better than 100 ppm from 0¡C to 70¡C. Operating from a 3.3V supply, the oscillator also offers a maximum current draw of 60 mA, with an integrated 0.1-µF bypass capacitor used to minimize the effects of power-supply transients. The M2980 comes in a standard DIL, through-hole stainless-steel package measuring 0.8" x 0.5" x 0.2". Price is less than $40 each in quantity. MF ELECTRONICS CORP., New Rochelle, NY. (914) 712-2200.

Company: MF ELECTRONICS CORP.

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