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    Archive Eepn Com Cluster Common Eepn Images Articles 14634
    1. Technologies
    2. Components
    3. Electromechanical

    Chip Seamlessly Connects PCI Bus To Motorola Processors

    Dec. 1, 1998
    Staff
    Archive Eepn Com Cluster Common Eepn Images Articles 14634

    This next-generation 32-bit PCI bus mastering interface chip is designed to seamlessly connect to, and take full advantage of, Motorola's MPC860 PowerQUICC and MPC850 processors. The PCI 9054 I/O accelerator is said to be the industry's first hot-swap-friendly interface chip for PCI- and CompactPCI-based telecommunications, networking and other high-bandwidth systems. Using firm's Data Pipe Architecture technology, a dual-channel architecture that provides complete control of bus, memory and data transfer, the PCI 9054 gives MPC850/860 telecomm and networking applications flexibility and high performance. Its seamless connection to the MPC850/860 results in faster design cycles while making full use of the processor's capabilities in embedded and adapter products.

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