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Tseng ET4000: Early Winner Falls Short on 3D

Aug. 24, 2022
Graphics Chip Chronicles Vol. 7 No. 4 - The ET4000 designed by Tseng Labs was one of the early winners in the world of graphics processors. But it was lapped by other technologies in the 3D era.

This article is part of the Electronics History series: The Graphics Chip Chronicles.

Founded by Jack Hsiao Nan Tseng and John J. Gibbons in Newtown, Pa., Tseng Labs developed a chipset for graphics add-in boards (AIBs) used in the IBM PC and compatibles from 1983 to December 1997.

The company was best-known for the ET3000, ET4000, and ET6000 VGA-compatible graphics chips. When Microsoft Windows 3.0 came out in 1990, Tseng Lab’s controllers grew in popularity. Despite having a conventional DRAM frame buffer, Tseng’s ET4000 family was noteworthy for its high-speed host interface (ISA) throughput.

The ET4000 was one of the last ISA-based AIBs and provided the core IP for three generations of ET4000/W32 2D accelerators.

The ET3000 series came out in September 1987, less than six months after IBM’s VGA announcement, and it shipped in high volume for over two years during a time when 50 companies were producing VGA compatibles. At the time, the ET3000 was feature-rich, supporting 1024 × 768 displays with a frame buffer size of 2 MB.

Tseng Labs developed several advanced graphics controller features that are still in today’s GPUs. They included the first integrated local bus controller and packed pixels from 8- to 24-bit color modes and image memory access (IMA) that first appeared on the ET4000/W32. It was a high-speed asynchronous input for video or graphics into the display buffer, extended register sets, and the first local bus graphics designs. The accelerator could expand a 1-bit-per-pixel (monochrome) pixel map into an 8-bit-per­pixel map. That was a helpful operation when painting fonts.

Using its IMA bus, Tseng was one of the first companies to incorporate a video accelerator with image-processing circuits, which the company branded VIPeR.

ET4000

The Tseng Labs ET4000/W32i video controller was an ISA/EISA/MCA-compatible graphics chip with an 8-/16-/32-bit bus or CPU direct (local bus) interface. It integrated a graphical-user-interface (GUI) accelerator and advanced features for developing imaging and multimedia markets.

The host interface was the second generation of Tseng Labs’ cache/memory-management architecture and boasted about 5X more performance than its predecessor, the ET4000/AX. A unique feature of the ET4000 was that the architecture maximized the capabilities of DRAM and eliminated the requirement for VRAM, reducing costs in the process.

Toshiba fabricated the chip in its Iwate 650-nm fab.

The ET4000 was a large chip for its time. The magic of the ET4000 was the small, clever, on-chip least-recently-used (LRU) cache (the cache design was used by a software company that licensed it to many PC companies for industry-standard benchmark performance testing). Tseng later migrated the design to multi-port, allowing follow-on products to handle multiple independent dynamic bandwidths to access DRAM with almost no latency.

Among the chip’s features were a 256-raster operation capability, a high-throughput graphics engine for faster hardware-accelerated BitBLT, support for a hardware-driven cursor or a second simultaneous display window, an imaging port, and memory-to-memory BLTs with masking and pixel amplification. Tseng claimed at the time that its pixel amplification could speed up text printing, color expansion, and area fill operations by up to 10X.

In 1992, IBM announced it would use Tseng’s ET4000/AX VGA graphics controller in its new 80486SX model 2133 and 2155 PS/1 PC.

The W32i offered all graphics modes, planar, or linear packed-pixel modes. It had a color capability from 1 to 16.7 million. Pixel depths could reach up to 32 bits per pixel. True­color modes (16.7 million colors) were optimized in the ET4000/W32i, providing the desktop computer market with the highest-quality 2D images at the time.

The first VIPeR—short for Video Image ProcessoR—debuted in 1994. The VIPeR offered high-quality real-time as well as computer-generated video. Key features included a professional-quality image scaler and interfaces to popular NTSC/PAL video decoders.

The first-generation VIPeR converted YUV 4:2:2 or 4:1:1 to 24-bit RGB, while future versions output YUV and allowed for color space conversion in the SuperVGA. The chips were employed in video products from Jazz Multimedia and Matrox. Tsang Labs had a competitive edge because it had more sophisticated video-processing algorithms than its rivals.

Evolution of the W32 Family and VIPeR

By May 1994, the company was working on two straight quarters of sales and net income growth. But compared to the prior year, the results were negatively impacted by lower margins on sales of the W32 family of graphics controllers, largely due to competitive market conditions and delays in wringing out anticipated cost reductions.

President Jack Tseng said, “The company has started to achieve significant cost reductions on the W32i and the W32p, which should begin to have an impact on our costs during the second quarter. Further cost-reduction efforts are also in progress, and additional reductions are possible by the fourth quarter.”

On November 22, 1994, Tseng Labs announced two new products promising full-screen, accelerated playback, and motion video capture in a lower-cost version of VIPeR.

“We now expect production ramp-up in the second half of 1994,” said Tseng. He promised the integrated ET6000 in the second quarter of 1995.

Joe Curley, Tseng’s Director of Marketing, said, “The VIPeR f/x will enable multimedia providers to develop products for sizing and scaling of video images to arbitrary window sizes from 16 × 16 pixels to 1024 × 768 in true color without dropping frames.” It was a lower-cost version with 4:1:1 and 1024 × 768 × 24 capability.

Tseng and Joe Curley were tight-lipped about the new semi-secret ET6000 device. Tseng said his view was that a virtual port cache is the essence of the display controller. He claimed to have been building it since the ET4000.

ET6000

The new chip was designed to display multiple windows from multiple sources—telecom, graphics, audio, etc. The ET6000 would be a big, fast switcher. One of its unique features, according to Tseng, was that it could predict the direction and frequency of upcoming data and then route that data to the appropriate memory. Internal data-rate switching speed was forecasted to be 2 Gb/s. Latency would be within 1 to 2 clock cycles at 60 MHz, synchronizing within one clock cycle.

Tseng said the ET6000 would come in two versions—3.3 and 5 V—based on 600-nm technology that could reach 4 Gb/s. The ET6000 would be a fully integrated controller with 135-MHz output LUT-DAC.

One of the most unique features of the ET6000 was the use of multibank DRAM (MDRAM) for graphics memory. MDRAM offered a large array of small memory banks. Combined with a novel fast-paging memory controller in ET6000, Tseng was able to effectively tap into more than 90% of MDRAM’s theoretical peak bandwidth. Two independent 16-bit paths to MDRAM, which could be treated as two different buses, were also onboard.

The new device supported a 16-bit IMA, and direct system bus support for ISA, PCI, and VLB. Curley said the company planned to show samples in a 208-pin package at WinHec or Spring COMDEX 1996.

According to Jack Tseng, “It will be very competitive—it’s almost like giving all that for nothing. Like W32 pricing.”

When asked about the future, he said, “We will have 3D in the future. There will be three separate parts in each family, a media channel and a flat panel version, in addition to the first unit.”

Battling the Competition

However, in the mid-1990s, too many companies flooded into the market. Many of them were developing—or were at least promising to develop—3D graphics chips. Tseng always had competitors, and it was an aggressive company in business as well as technology. But the added competition sapped its profit margins and, in turn, the R&D budget. The company also inadvertently misused some of its resources, further starving development.

By 1996, Tseng had lost significant market share to S3 Graphics and ATI Technologies. And, despite its leadership in design, the company was late integrating a LUT-DAC into its controllers—it wasn’t until the ET6000 was introduced in late 1996 that it had an integrated LUT-DAC. Rivals had been shipping such devices for over a year at that point. Integrating the LUT-DAC reduced the cost of an AIB, giving them a competitive advantage. That severely hurt Tseng’s competitiveness.

But competition in the 2D and GUI accelerator market slowed it down. Slim profit margins not only crippled its R&D, but also stretched the company’s cash flow, making it difficult for the company to buy parts. It also struggled to buy adequate supplies of memory for its updated AIBs.

Lacking the funds to complete the development of its 3D engine (the ET6300), Tseng’s board of directors decided to abandon plans to build a next-generation chip. The plan was canceled in favor of preserving cash and courting potential buyers. The strategy resulted in ATI’s acquisition of the company.

What Happened to Tseng Labs?

Tseng was innovative. Crazy. Chaotic. Immature, maybe—but innovative. The company contributed the first 132-column alpha/numeric, the first SuperEGA, the first SuperVGA, the first cheap true color, the first local bus, the first bidirectional over-the-top bus (SLI owes a lot to that), and more. But they weren’t agile and fell prey to mismanagement.

In November 1997, a new strategic plan was announced. Tseng and its board evaluated the company’s strategy for the commercialization of the ET6300 and future new product development, and a course of action that would use the company’s resources, including $28 million in cash. Tseng decided not to complete the ET6300.

Given the lead time and R&D costs required to produce new graphics products, Tseng decided to cease development efforts on all future products. However, the company said it intended to continue to work with 3D and multimedia graphics technologies to position the company for strategic partners and merger candidates.

In addition to a reported 20% to 30% reduction in staff, Tseng announced that it would pare down to a mere 50 employees.

Not long after, Jack Tseng resigned. Another founder, John J. Gibbons, replaced him as CEO and chairman of the board.

Jack Tseng is a justifiably proud engineer who made mistakes similar to other justifiably proud engineers who founded their own companies. Tseng rose to prominence in the EGA era and continued to preside over the company’s dominance into the days of the VGA. S3 stole the company’s thunder at the dawn of the Windows accelerator age, but Tseng was able to strike back with the W32 and the ET6000 designs. It was 3D that finally got the best of Tseng Labs, which loosely partnered with other companies on several occasions (S-MOS PIX, and NEC’s PowerVR) while continuing to work on their 3D technology.

On December 22, 1997, ATI announced plans to acquire the graphics design assets of Tseng for approximately $3 million.

Under the terms of the purchase agreement, ATI acquired all of the graphics design assets of Tseng Labs, including specific hardware and software licenses. About 40 employees, including engineering and marketing personnel, accepted offers of employment with ATI’s U.S. subsidiary, ATI Research.

This article is part of the Electronics History series: The Graphics Chip Chronicles.

About the Author

Jon Peddie | President

Dr. Jon Peddie heads up Tiburon, Calif.-based Jon Peddie Research. Peddie lectures at numerous conferences on topics pertaining to graphics technology and the emerging trends in digital media technology. He is the former president of Siggraph Pioneers, and is also the author of several books.  Peddie was recently honored by the CAD Society with a lifetime achievement award. Peddie is a senior and lifetime member of IEEE (joined in 1963), and a former chair of the IEEE Super Computer Committee. Contact him at [email protected].

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