Network Processors Make Easy Work Of Multilayer Application Acceleration

March 16, 2006
Ten additional devices in the Octeon family of system-on-a-chip processors from Cavium Networks deliver highly integrated solutions for next-generation wired networks, wireless networks, and control and storage applications. All of the models in the CN31

Ten additional devices in the Octeon family of system-on-a-chip processors from Cavium Networks deliver highly integrated solutions for next-generation wired networks, wireless networks, and control and storage applications. All of the models in the CN31XX and 30XX families are based on a single or dual 64-bit MIPS64 CPU core.

These processors integrate multilayer application acceleration, security processing hardware, and a wide range of networking I/O options. They also integrate extensive hardware acceleration options for layer 3 to layer 7 data, content processing, and security services. These accelerators offload the MIPS CPU(s) and help lower the CPU clock rate needed to achieve Gigabit line rates.

Like the previous CN38XX and 36XX lines, the new families are based on the cnMIPS64 core. They include up to 256 kbytes of L2 cache, a Gigabit network interface, a PCI/PCI-X host interface, a DDR2 DRAM controller, a USB 2.0 serial port, a TDM/PCM port for voice applications, and still other I/O support. Clock speeds range from 300 to 550 MHz. Power consumption ranges from 2 to 7 W.

Versions of the processors are available with resources optimized for communications (CP), secure communications (SCP), and network services (NSP). The CP includes hardware acceleration for packet processing. The SCP adds acceleration for IPsec/SSL, SRTP, and wireless local-area network (WLAN) security. The NSP adds acceleration for deep packet inspection and compression/decompression.

Chips in the CN31XX family range from $49 to $125 each in lots of 10,000, while chips in the CN30XX family range from $19 to $39 each in lots of 50,000.

Cavium Networks Inc.
www.caviumnetworks.com

About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.

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