RTL Reference Design Provides High-Performance Interface

The Virtex-II SiberBridge, a product jointly developed by the company and Xilinx, is a register transfer level (RTL) reference design that provides a high-performance interface between a 32-bit host and one or more SiberCAM packet forwarding co-processors. The SiberBridge is fully synthesizable Verilog/VHDL reference code, suitable for implementation in the Xilinx Virtex-II FPGAs.
The SiberBridge provides a way to initiate searches, obtain search results, and perform table maintenance operations for the SiberCAM packet forwarding subsystem via a single 32-bit synchronous SRAM or ZBT SRAM interface. The SiberCAM device is a large capacity packet forwarding and classification co-processor that increases switch and router throughput.