Servicing a variety of embedded and consumer video streaming and mixed media applications, the 78Q8430 TCP/IP 10/100 Fast Ethernet multimedia offload controller frees up host processor MIPS for image/audio processing, format conversion, and encoding/decoding tasks by offloading many of the communications processing tasks to the controller. The device interfaces to non-PCI processors through a pseudo SRAM-like host bus interface supporting 32-/16-/8-bit data bus widths. It provides support for IEEE802.3x flow control and compliance with IEEE802.3 and 802.3u standards and employs a management scheme for its 32-KB SRAM FIFO memory to adaptively allocate memory depending on the data stream load and direction. Other features include a packet classification engine that supports up to 128 user-configurable rules and, by default, the controller comes configured with eight unicast IP address filtering. It is also configurable for wildcard address filtering, positive/negative filtering, promiscuous mode operation, and multicast and broadcast mode operation. Other offload functions include 64-KB JUMBO packet support, IP checksum calculation, check/generate/strip/append CRC’s, four levels of transmit priority queuing, and the ability to drop frames based on source IP address. Commercial-temperature grade samples and evaluation kits for ST OS/20 and Linux 2.6.x (for ARM920T) are available now. TERIDIAN SEMICONDUCTOR CORP., Irvine, CA. (714) 508-8800.
Company: TERIDIAN SEMICONDUCTOR CORP.
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