Higher-Speed Front-Side Bus Boosts Server Throughput

By raising the front-side bus (FSB) speed to 667 MHz, two Intel Itanium 2 processors deliver more than a 65% system bandwidth improvement over servers with processors that use a 400-MHz FSB. The FSB connects and transfers data between the microprocessor,

Dave Bursky

Sept. 1, 2005

The higher-speed version will help set the stage for the forthcoming dual-core Montecito Itanium processors, which also will use a 667-MHz FSB. The improved front-side bus bandwidth permits data transfers of 10.6 Gbits/s to pass from the processor to other system components.

The ability to move more data in a very short period of time is critical to compute-intensive applications in the scientific, oil, and gas and government industries. The 667-MHz FSB versions of the Itanium 2 processor run at a clock speed of 1.66 GHz and pack either 6 or 9 Mbytes of cache. In 1000-unit lots, the processors cost $2194 and $4655 each, respectively.

Intel Corp.
www.intel.com

About the Author

Dave Bursky

Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.