Self-Aligned Split-Gate Process Cuts Flash-Memory Cell Size By 40%

July 10, 2000
A self-aligned process technology that cuts the size of flash-memory cells by 40% has been developed by Silicon Storage Technology (SST) Inc., Sunnyvale, Calif. According to the company, this split-gate architecture designed for flash-memory cells...

A self-aligned process technology that cuts the size of flash-memory cells by 40% has been developed by Silicon Storage Technology (SST) Inc., Sunnyvale, Calif. According to the company, this split-gate architecture designed for flash-memory cells is the first in the industry to offer self-alignment. It substantially reduces the cell's size, and it also assures scalability for smaller geometries. Using this NOR-type architecture, SST developed the SuperFlash cell in conjunction with licensee IBM.

The SuperFlash technology utilizes a reliable thick-oxide process with fewer manufacturing steps. This produces a low-cost, nonvolatile memory solution with excellent data retention, SST says. The architecture facilitates a simple and flexible design suitable for high performance, high reliability, and small- or medium-size in-system or off-system programming applications. It offers a variety of densities in a single CMOS-compatible technology as well.

SST believes the SuperFlash will quickly lead to cutting-edge process geometries of 0.13 µm and smaller. The company has demonstrated the cell for three of its foundry partners—Sanyo Electric Co. Ltd., TSMC-Acer Semiconductor Manufacturing Co., and Taiwan Semiconductor Manufacturing Co. (TSMC) Ltd. Products based on a 0.18-µm self-aligned SuperFlash cell should begin shipping early next year.

Licensees TSMC and Sanyo are currently using the cell for embedded applications. TSMC offers both the conventional and the self-aligned SuperFlash cell through its EmbFlash processes.

For more information, contact SST at (408) 735-9110, or go to www.ssti.com.

About the Author

Roger Allan

Roger Allan is an electronics journalism veteran, and served as Electronic Design's Executive Editor for 15 of those years. He has covered just about every technology beat from semiconductors, components, packaging and power devices, to communications, test and measurement, automotive electronics, robotics, medical electronics, military electronics, robotics, and industrial electronics. His specialties include MEMS and nanoelectronics technologies. He is a contributor to the McGraw Hill Annual Encyclopedia of Science and Technology. He is also a Life Senior Member of the IEEE and holds a BSEE from New York University's School of Engineering and Science. Roger has worked for major electronics magazines besides Electronic Design, including the IEEE Spectrum, Electronics, EDN, Electronic Products, and the British New Scientist. He also has working experience in the electronics industry as a design engineer in filters, power supplies and control systems.

After his retirement from Electronic Design Magazine, He has been extensively contributing articles for Penton’s Electronic Design, Power Electronics Technology, Energy Efficiency and Technology (EE&T) and Microwaves RF Magazine, covering all of the aforementioned electronics segments as well as energy efficiency, harvesting and related technologies. He has also contributed articles to other electronics technology magazines worldwide.

He is a “jack of all trades and a master in leading-edge technologies” like MEMS, nanolectronics, autonomous vehicles, artificial intelligence, military electronics, biometrics, implantable medical devices, and energy harvesting and related technologies.

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