LVT Family Offers Devices With & Without Bushold On Data Pins

Representing the firm’s first foray into the low-voltage TTL-compatible (LVT) logic market, this new logic family is said to provide high design flexility by offering devices with and without bushold on the data pins. Available with the bushold feature, LVTH devices eliminate the need for external pull-up or pull-down resistors to prevent floating inputs. By contrast, LVT devices come without bushold and are well-suited for use in designs having power consumption constraints or needing to avoid switching problems created when multiple bushold devices are connected to a common bus. Made using a BiCMOS process, the LVT family is said to feature low noise and power up/down high impedance I/Os, allowing live insertion and facilitating power management. Twenty devices are currently available in various packages (i.e., SOIC, EIAJ SOIC, TSSOP and SSOP), with the product portfolio expected to expand to 40 devices during the year. Among the products presently available are 74LVT573 and 74LVTH573 octal transparent latches with 3-state outputs and 74LVT16245 and 74LVTH16245 16-bit transceivers with 3-state outputs. Also available are 16-bit buffer/line drivers, octal D-type flip-flops, and quad buffers.