SERDES Transceivers Hit 6.25 And 10 Gbits/s

Backplane serializer/deserializer (SERDES) transceivers offering 6.25- and 10-Gbit/s data-transfer rates now come from PMC-Sierra Inc. and Accelerant Networks Inc., respectively. PMC's PM8359 QuadPHY 6G chip complies with the Optical Internetworking...
March 29, 2004

Backplane serializer/deserializer (SERDES) transceivers offering 6.25- and 10-Gbit/s data-transfer rates now come from PMC-Sierra Inc. and Accelerant Networks Inc., respectively. PMC's PM8359 QuadPHY 6G chip complies with the Optical Internetworking Forum's 6-Gbit/s long-reach specification. It multiplexes and demultiplexes eight 3.125-Gbit/s serial links into four 6.25-Gbit/s links and employs an adaptive decision feedback equalization scheme to ensure robust link operation. Samples cost $250 each. Using PAM4 multilevel signaling to deliver data at 10 Gbits/s or decision feedback equalization to achieve 5-Gbit/s data rates, Accelerant's AN6000 low-power SERDES consumes just 870 mW per 40-Gbit/s total payload. The AN6420 packs four backplane interface cores, and the AN6620 is a quad 6.25-Gbit/s transceiver. Pricing is $80 in volume.

PMC-Sierra Inc.www.pmc-sierra.com/serdes Accelerant Networks Inc.www.accelerant.net

About the Author

Dave Bursky

Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.

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