Nano Array Of Read/Write Tips Produces 1-Tbit/in.2 Memory Density
The densest silicon memory chip yet, a prototype device with a MEMS silicon platform that moves beneath an array of nanoscale-size read/write tips, has achieved a density of 1 Tbit/in.2 That's 20 times what's commercially available. Developed by IBM's R&D lab in Zurich, Switzerland, the "Millipede" nano device can be operated at lower power levels than conventional memory storage devices.
As a proof of concept, IBM built a 3- by 3-mm chip that stores 200 Gbits/in.2 The storage medium is an active thin-film polymer layer deposited above a silicon MEMS chip. Above this "table" is a 2D array of 1024 (32 by 32) cantilevers (see the figure). Each V-shaped cantilever tip, 70 µm long and about 0.5 µm thick, is individually addressable and ends in a downward-pointing tip less than 2 µm long, where it contacts with the table for reading, writing, erasing, and rewriting data.
The table is moved precisely in the X and Y directions by electromagnetic actuation, with respect to the tips. Each tip can read or write within its own storage field of about 100 µm on a side by making 10-nm indentations in the polymer film. IBM says this is essentially atomic-level data addressing.
"We anticipate a thousandfold improvement in storage density," says IBM fellow and Nobel laureate Gerd Binnig, a researcher on the project. With flash memory technology not expected to go beyond 1 to 2 Gbytes in the near term, IBM foresees Millipede devices with 10 to 15 Gbytes in the same tiny format now used, at even less power.
"Besides its tremendous data-capacity potential, we're exploring the use of this concept in other areas like microscopic imaging, nanoscale lithography, and atomic and molecular manipulation," says Peter Vettiger, Millipede's project leader.
For details, visit www.ibm.com.