Storage Accelerator RAIDs Desktop Systems

Dec. 4, 2003
Supporting wire-speed striped-parity RAID for reads and writes, the SyncRAID controller delivers higher writer performance than RAID 5 along with better reliability.

A controller that delivers write throughputs and reliability levels beyond RAID 5 capabilities—sounds lofty, but the TD6405 SyncRAID controller achieves just such a goal. Developed by NetCell, it implements a low-cost RAID-like subsystem for media-centric workstations, multimedia servers, video storage applications, and other high-performance systems. The controller supports both 64-bit PCI-X and mainstream 32-bit PCI buses at either 33 or 66 MHz.

The TD6405 stakes a claim as the first single-chip storage accelerator to perform direct synchronous striping of data as 64- or 32-bit words onto an array of off-the-shelf ATA or serial ATA hard-disk drives. Only an external flash memory and an external SRAM-based cache are required to complete the subsystem. When operating in 64-bit mode, the on-chip datapath provides an 800-Mbyte/s bandwidth. This enables data to be simultaneously transferred from all drives at maximum bandwidth while streaming data to and from the host over the PCI interface.

To the host system, the controller looks like a standard dual-channel IDE controller. On the other side, the chip can connect up to five ATA UltraDMA 5 hard drives or five serial ATA drives. The chip's drive interface supports RAID 0, 1, and the company's SyncRAID mode. The SyncRAID mode, similar to RAID 3, is a striped-parity mode of operation that employs an on-the-fly XOR engine for parity generation and data regeneration. One of the drives connected on the storage ports is a dedicated parity drive, which is used to store redundant information.

Unlike a RAID 5-compatible controller that's optimized for transaction-based applications in multiple-user environments, the TD6405 is targeted more for desktop, media-intensive file-based applications (see the figure). Going one step beyond current RAID controllers, the TD6405 supports full-speed striped parity reads and writes without impacting input/output performance. The on-the-fly hardware exclusive-OR engine eliminates the traditional read-modify-write sequence associated with mainstream striped-parity RAID engines. It also effectively doubles performance versus RAID 5 implementations.

In legacy RAID systems, 16-bit ATA interfaces are used on each port. A block of 64-bit data words from the host bus is typically divided into a stream of 16-bit words and then issued to individual drives until the block stripe is full or the block write is complete. If the block occupies more than a single-drive strip block or "chunk," it moves onto the next drive. There, it starts using another strip block until the entire block transfer is completed.

In contrast, the SyncRAID approach employs a synchronization scheme, eliminating the data blocking so that the data words are kept intact as 64 bits all the way to the drives. This effectively creates a 4× speed ATA or serial ATA interface

When utilized with five 7200-rpm ATA drives, the TD6405 delivers 190 to 200 Mbytes/s of sustained read throughput and up to 110 Mbytes/s of sustained write throughput for a parity-protected array with up to one terabyte of storage. The controller, when used on a bus adapter card or on the motherboard, requires no new drivers on the host operating system (Windows XP and Windows 2000). Additionally, minimal porting efforts are needed to adapt it for Linux and Apple's OS X.

Housed in a 608-contact BGA package, the TD6405 sells for $79 each in lots of 10,000 units. TurboDisk three- and five-port ATA SyncRAID controller OEM evaluation boards, with supporting software and development tools, are available as well.

NetCell Corp. (408) 935-7700www.netcell.com
About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.

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