High-End Processes Invigorate 10th-Gen FPGA/SoC Performance

The recently launched Arria 10 and Stratix 10 families represent Altera’s 10^th generation of FPGAs and SoCs. Intel’s 14nm TriGate process combined with an enhanced architecture, used for Stratix 10 FPGAs and SoCs, doubles the performance of the Stratix 5 for a 30% power penalty. It’s possible to dial back to Stratix 5 performance with only 30% of the previous generation’s power consumption. The new generation will yield 1.4 to 1.6 times the performance for the same power consumption as Stratix 5. The new Stratix devices are approximately four times as dense as the previous generation, with over 4 million logic elements (Les) on a single die. The Arria 10, which is billed as a midrange family by Altera, improves performance by 15% over today’s high-end Stratix 5 devices, while consuming 40% less power than Arria 5. These FPGAs and SoCs use TSMC’s 20-nm process. Four times more I/O bandwidth is offered compared to predecessors—16 transceiver channels operate at 28.05 Gbits/s—with double the LE density (1 million per die).

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