Leveraging FPGAs In Portable Storage Applications

Dec. 13, 2007
In portables, the latest FPGAs can help satiate demands for lower power and flexibility while still increasing battery life.
To stay “connected and in touch,” consumers increasingly rely on their portable devices, ranging from smart phones, personal media players, and digital cameras to emerging solutions like electronic notebooks. Today’s handhelds serve multiple roles and offer various functions that translate into a host of storage, feature, and technology challenges depending on the end application.

At the same time, portable designers are under increased cost and time-to-market pressures, struggling to deliver new features and keep pace with rapidly evolving standards in the price-sensitive consumer market. Complicating matters further is the need to deliver all of these features without sacrificing battery life.

Field-programmable gate arrays (FPGAs) are traditionally seen as the best vehicle for getting designs to market fast. Yet use of the technology has been limited to prototyping due to power consumption and cost concerns.

Over the past few years, however, design advances have pushed FPGAs into high-volume portable designs. Also, emerging solutions are helping designers reduce cost and increase battery life. Flash-based FPGA solutions, for example, eliminate power-hungry configuration memory and the leakage current associated with SRAM-based solutions.

FPGAs are available with static power as low as 5 mW and active/dynamic power as low as 25 mW—power consumption rivaling custom ASICs and application-specific processors. Moreover, their inherent programmability enables designers to engage in platform-based design. This lets OEMs work from a single base platform and add or strip out features to satisfy multiple price points. The ability to leverage hardware and software design costs across multiple product models leads to greater economies of scale for portable designers.

THE PORTABLE STORAGE LANDSCAPE • Increasing digital content in today’s portable devices ups the demand for greater storage capability. As a result, portable storage can account for a large majority of the power consumed in an electronic device.

From hard-disk drives (HDDs) to flash devices, portable storage applications can leverage FPGAs for lower cost, increased flexibility, and longer battery life. Application processors, which are used to run the operating system (OS) and the application software, have predefined interfaces and generally are unable to adapt to rapidly changing market requirements.

Thus, key areas where FPGAs can deliver muchdesired flexibility include storage, processor bridges and controllers, and connectivity interfaces. In these applications, flash-based FPGAs are able to reduce power consumption while supporting myriad storage interface standards.

A variety of storage solutions, broadly classified as flash storage devices and HDDs, is available for use in today’s growing array of electronic devices. Portable products requiring the high-storage capacity of an HDD solution, such as video recorders and camcorders, will employ one of two types of controller. The first is an integrated- device-electronics (IDE) controller, which is based on parallel or serial ATA standards. The second is a consumer electronics ATA (CE-ATA) controller—a common standard among small form-factor devices like portable media players and handheld devices.

Flash-memory usage is also expanding, giving rise to another set of storage interfaces. Multiple memory-card formats, such as Secure Digital (SD) and the very small and removable Compact Flash (CF) solution, along with NAND flash controllers, are the primary interfaces used in the flash market.

Handheld devices may either use a combination of these interfaces or require just one interface for a particular application. Either way, semiconductor solutions must provide the flexibility to implement any number of interface options.

Application processors traditionally provide support for a select number of storage interfaces. However, a new trend in handheld design pairs application processors with ultra-low-power FPGAs, using the FPGA to provide the bridging function and extend the processor’s storage interface support (Fig. 1).

• When implementing a storage system, it’s important to focus first on basic architecture choices. First, which processor will be used? In the competitive portable market, there are usually several leading processor candidates, and often the designer’s choice can be influenced by multiple factors— from technical requirements like performance, size, and power profile to previous design experience using that particular processor.

Consequently, designers must carefully evaluate their design goals. Does the design depend on a previous architecture and, therefore, is it required to be backwardcompatible? Do the engineers have the flexibility to choose the processor with which they have the most experience? Does the design require low power? Certainly, in a portable application, the processor’s power consumption and efficiency will be key factors in the decision.

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Decisions must also be made with respect to the memory architecture. What interface is available on the main processor? Are some stored items accessed more frequently than others? If there’s a difference in frequency of access, a two-tiered system may be optimal. Does the application need to access memory fast to meet the application’s needs? If so, having a dedicated memory controller may be required. Does the system need to recognize the memory type attached and match the interface standard on the fly? Again, having an external adaptable controller would enable this feature.

Often, the end application’s design requirements influence the choice of processor, not the memory interfaces supported by that particular processor. The choice of memory will also be influenced by the needs of the end application. As a result, between the processor and memory, interface options can number in the tens to hundreds.

Designers may need to test several different storage options to deliver proof of concept before any further development. Using an FPGA as an interface solution provides complete flexibility when matching the interfaces available from the processor to the optimal memory solution.

CHOOSING A STORAGE-INTERFACE PLATFORM • The next step in storage implementation is processor- and application-dependent. Most processor manufacturers in the storage space provide full development platforms to facilitate the use of their specific processor platform. Each processor board will come with a standard set of interfaces, but these interfaces may not match those required for the chosen storage technology.

The processor development board should have a standard expansion header, specifically designed to allow the development of daughtercards that support additional peripherals as well as allow the evaluation of multiple storage protocols with the same processor. Having selected a motherboard for prototyping, a daughtercard with an on-board FPGA will create flexibility when choosing the storage interface without having to purchase multiple daughtercards.

An FPGA can be used in one of two ways on a processor expansion card. The first extends native peripheral support by adding extra memory slots that are compatible with existing slots on the processor. The second enables non-native peripheral support, adding interfaces not available on the processor.

Figure 2 illustrates Freescale’s i.MX27 multimedia development platform. The i.MX27 processor is targeted at video applications, such as video security and video- or voice-over-IP. The processor also has an extensive list of interfaces to satisfy most applications.

In the development platform, the supplier wanted to add some other memory interfaces to the platform. The flash-based FPGA, selected for non-native peripheral support, connects directly to the address and data bus of the i.MX27 processor. Through its own SD/MMC and CE-ATA protocol interfaces, the FPGA also enables the use of SD Card and Micro Hard Drive storage mediums with the Freescale processor.

When proof of concept is required, it’s useful to have a memory card that can support all possible interfaces. Ideally, the board should be able to recognize the type of memory inserted and select the correct interface from the FPGA to the processor. With the sophisticated auto-connect feature, designers needn’t know how to program the FPGA for each device. However, designers can evaluate the chosen protocol for their end application. A universal memory card can also be used with multiple processors for evaluation.

Employing industry-standard development boards saves months in development time and manufacturing costs. By performing the first round of device selection and possibly device elimination without spending resources on prototype systems, multiple processors and interface standards can be evaluated before committing to the final architecture.

POWER MEASUREMENT • For low-power portable applications, it’s best to begin with a development platform designed with low power in mind. Often, these platforms already utilize components with lower power profiles, eliminating some of the additional design optimization work required later.

Comprehensive development platforms will provide schematics and bill-of-materials (BOM) details, which should be carefully studied when considering the layout and components used in the final design. The ability to measure the power consumption of either the whole system or of individual components is also a critical aspect when choosing the best development platform and daughtercard for your low-power portable application.

Having already chosen a processor, memory type, and IP, the next stage of low-power storage implementation is to determine if the resulting system is truly low-power. In this case, FPGA storage expansion interface cards are available to measure power.

Each measurement is made possible with the use of onboard jumpers. To measure any position on the board, it’s necessary to switch off the device, remove the jumper, connect a multimeter, and, then, power up the system. Power can be isolated for the following locations:

  • FPGA core current measurement assists in evaluating IP power usage and demonstrating flexible power-optimization modes available for the FPGA. Note that the FPGA in use can operate in a 1.5- or 1.2-V core, so make sure to calculate power using the correct voltage.
  • Two additional jumpers allow for current measurement at the 3.3-V regulator source supply.
  • Each I/O bank on the FPGA can be run from a different voltage, enabling current to be measured independently on each one.

To assist in these measurements, the system communicates which function is being performed at any specific time through LEDs. It also shows the voltages and modes that are in operation.

In addition to measuring power at the board level, the ability to measure power at the device level via softwareanalysis tools is significant. Most vendors use power calculators for analysis. Here, the number of registers and clock frequencies can be entered to provide power values.

More accurate measurement, which is particularly handy with IP, involves synthesizing the design and then testing through smart power-analysis tools. These tools review power usage in each architectural feature of the device, each power supply, and each I/O bank. As the accuracy of poweranalysis tools improves and designers learn to trust the results, design cycle time can be further reduced.

The multiple-memory development platform evaluates the power usage of each memory interface and demonstrates sleep modes (Fig. 3). When a device is put into sleep mode, such as FlashFreeze, the system needs to be tested to ensure that the command to wake up the interface is timed correctly. This ensures that the interface is fully up and running when needed.

With flash-based FPGAs, the FlashFreeze technology allows the FPGA to be instantly ready when requested, with memory and register contents intact. If you’re using SRAM FPGAs, sufficient time (on the order of 150 ms) must be given so that the FPGA can wake up and reconfigure. A time delay of this magnitude may be a limiting factor in certain applications and should be tested as part of the system proof of concept.

As FPGA technology becomes more sophisticated, FPGA solutions can finally provide the low-power consumption required by portable devices. Moreover, as inherently programmable solutions, they can also deliver the increased flexibility required by portable designers to adapt to the virtually hundreds of processor and memoryinterface combinations used in today’s handheld devices.

Combined with comprehensive development platforms and software-analysis tools that facilitate power measurement at each stage of development, flash-based FPGAs provide a vehicle for increasing battery life in portable devices. With FPGAs, designers can significantly reduce their time-to-market and development costs while continuing to meet the diverse demands of today’s consumers.

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