Field-Programmable SOC Combines FPGA & RISC CPU

Claimed as the first programmable system-on-a-chip (SOC) device, the AT94Kxx family of field-programmable system-level ICs (FPSLICs) integrates all of the building blocks required for a system-level design. These include: 40,000 gates of the firm's AT40K FPGA with FreeRAM, a 30+ MIPS AVR RISC processor, 32 kbytes of program SRAM and frequently used on-chip peripherals such as SPI, UARTs, timer/counters and a hardware multiplier.The devices are supported by the firm's System Designer EDA tool suite, which provides a seamlessly integrated system-level design flow that supports hardware/software co-design of FPSLIC devices. The suite's co-verification framework fully synchronizes FPGA hardware and RISC processor software execution, and provides source and assembly-level software debugging with full visibility into the FPSLIC's memory, registers and hardware logic. Place-and-route, macro generators, HDLPlanner and extensive bitstream utilities provide a rapid logic design and development environment. The device's reprogrammability and the unified software/hardware design environment can reduce design time by one to three months.