Xilinx Unifies FPGA Line

ISE 12 will support the latest Series 7 FPGAs

Xilinx’s new Series 7 line of 28nm FPGAs is now divided into three product lines (Table 1): Artix, Kintex and Virtex. Xilinx gets significant performance gains by using high-k metal gates (HKMG). The lower power chips utilize 50% less static power and 30% less total power. Intelligent clock gating and partial reconfiguration support by the ISE development system can provide an additional 20% dynamic power reduction.

Series 7 retains the Virtex name from prior incarnations and is still top of the line supporting PCI Express Gen 3 and providing a SERDES bandwidth of 1.8Tbits/s. It has 2 million logic cells, a 2.5x improvement, that are now the same across all three product lines. Prior families were transparent from a logic point of view but now they match at the transistor level making migration among families significantly eaiser. Series 7 Virtex is essentially twice the performance of Series 6 while cutting the power requirements by 50%. Virtex has been used in a wide range of high performance platforms like Nallatech’s PCIe-180 (see Card Links 10GE To FPGA For Low-Power, Data-Centric Processing) designed to handle 10 Gigabit Ethernet.

The midrange Kintex targets applications like LTE infrastructure where low cost, low power needs must be balanced with performance. It is available in low cost lidless and high performance flip chip packages. It support PCI Express Gen 2.

The new low cost solution is called Artix. It represents a 50% improvement in power over the older Spartan line while reducing cost by 35%. It is available in a compact wire-bond BGA package. It has built-in support for a x4 PCI Express Gen 1 link. Gen 1 PCI Express runs as 3.75 Gbits/s. This provides an ideal interface to a host processor. 

Xilinx recently released their ISE 12 FPGA Dev Suite (see Xilinx Delivers ISE 12 FPGA Dev Suite) that will support Series 7 chips when they become available. Chips will be available at the start of 2011.

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