Speedy 22nm FPGA Packs PicoPIPEs

Nov. 19, 2010
Acrhonix's next generation of Speedster FPGAs will be based on Intel's 22nm process technology.

Achronix Speedster22i-HP

PicoPIPE pipelining

Intel and Achronix have partnered to deliver the highest performance FPGAs using Intel's 22nm process techology. The Speedster22i-HP (Fig. 1) utilizes Achronix's picoPIPE technology (Fig. 2). The picoPIPE implements a self-clocking FIFO architecture (see 1.5-GHz FPGA Takes Clock Gating To The Max).

The product line brings high performance, 28 Gbit/s SERDES to the table. It will also support 10, 40 and 100 Gigabit Ethernet MACs. Interlaken and PCI Express Gen 3 will be part of the hard IP (intellectual property) on-chip. DMA support will also be part of the puzzle. The DDR2/DDR3 controllers will halde up to 2133Mbits/s.

The 1.5 GHz Speedster22i-HP (high performance) will support up to 700K LUTs (lookup tables). The 750 MHz Speedster22i-HD (high density) versions will handle up to 2.5M LUTs. These latter targets lower cost, higher density applications.

The use of PCI Express and ties with Intel are significant. This partnership will likely make integration with Intel CPUs more likely and significantly easier. Matching a CPU with a GPU can provide power supercomputer clusters. Blending a CPU with a Speedster22i FPGA provides a flexiblity to supercomputing that will be unparalleled. It could offer interesting possibilities for cloud computing.

The FPGAs will find homes in a wide range of applications from telecommunications to medical imaging. Pricing for a 1M LUT Speedster22i-HD will be under $400.

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William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

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