Check Out Chip Designs On The Cloud

March 26, 2013
Plunify's EDAxtend pushes FPGA design chores to the cloud to improve designs while reducing time-to-market.

FPGAs are great. They are usually accompanied by design tools like Altera's Quartus II and Vivado from Xilinx (see FPGA Design Suite Generates Global Minimum Layout). These tools allow a designer to create an FPGA and to test its configuration addressing timing and power aspects to make sure the design will perform properly.

Much of the design work is interactive but a significant portion is number crunching to handle details like layout and timing. Working with a desktop application for this is more than adequate an initial design but many stop once a working platform is available. This is fine for many applications but more often the design needs to be optimized before it ships. Optimization mean reducing the size of FPGA required for delivery or it might mean reducing power requirements. Of course, increasing performance is also in the mix.

Creating and testing these variations can easily overload a designer with a desktop system and Plunify offers an alternative by taking this part of the design cycle to the cloud. It addresses simulation, regression testing and place and route compilation where multiple design variations come into play with its EDAxtend cloud platform (Fig. 1).

Figure 1. The EDAxtend cloud platform targets simulation, synthesis and place and route aspects of the FPGA design cycle.

The cloud interface just requires a web browser. Plunify also has some desktop support with a Xilinx ISE SmartXplorer plug-in called Explorer ++. Plunify uses the standard output from conventional FPGA design tools so this is an extension to the designer's usual toolset.

An example highlights how Plunify accelerates the design process. In this case, a customer had a working design that require two of the largest FPGAs on the market. The design too half a day to build. Plunify's cloud was able to run hundreds of builds in just two days allowing the customer to fit the final design into a single FPGA.

Plunify uses a prepaid, credit style subscription to use their cloud. There is an estimator program based on a single place and route run on a PC. The system can also be rum time limited in a variety of ways including finding a desired solution, overall time, or credit usage.

Different web tools address the FPGA design cycle. Cloud Closure can address timing closure experiments. It can be used to fine tune speed, size and power consumption.

The cloud-based approach offers designers a number of advantages. This type of work usually generates resource usage spikes and companies do typically have the functionality to address these spikes. The cloud provides that support. Likewise, rigorous regression testing and other resource intensive tasks are very useful in delivering robust and reliable products. Plunify helps companies make this delivery faster and at a lower cost.

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.

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I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.  

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