Memory System Performs Self Test And Repair

Reigning as the only commercially available embedded memory self-test and repair system, the third-generation STAR memory system adds enhancements that promise faster time-to-market, lower test costs, smaller area, and a better yield for complex system-on-chip designs. These enhancements provide increased intelligence and automation. The system’s ECC circuitry employs the standard single-error-correction, double-error-detection (SEC-DED) approach to automatically detect and correct soft errors. It now includes intelligent test algorithms that detect row and column failures in smaller memories and repair them, ensuring higher yield. Higher leakage currents common at 90 nm and below are addressed by leakage tests. In terms of automation, the STAR Builder automates the process of the system’s insertion into the functional hierarchy of the SoC design to accelerate the overall product development schedule. Automating the insertion task helps manage the multi-level design hierarchy and cuts down the overall implementation time. The system is available now for 180-, 130-, and 90-nm memories. VIRAGE LOGIC CORP., Fremont, CA. (877) 360-6690.