SD and Micro SD flash memory cards have become ubiquitous in consumer and industrial devices, but lurking behind these familiar facades is a plethora of interfaces ranging from a single data bit interface to an Ultra High Speed (UHS) II interface that uses a pair of high-speed differential signals. To see the difference, one must examine the connector side of the card (see figure).
The original SD card 3.3 V interface uses a single-bit, SPI synchronous interface with a clock and strobe signal with a 48-bit command and response. The command interface is a variation of the MultiMediaCard (MMC) interface with additional copy protection support. SDHC and SDXC cards can be commanded to switch to a 1.8 V interface providing power savings. The use of SPI makes interfacing to a microcontroller a relatively easy chore.
Of course, faster, higher capacities necessitated improvements. The answer was higher clock rates and switching from SPI to quad SPI (QSPI) support. QSPI transfers four data bits at a time instead of one bit. A bidirectional bus was used to minimize the pinouts. The 8-pin interface includes power, ground, clock, command and four data bits.
The UHS-I standard used the 8-pin interface running at 100 MHz. A double data rate (DDR) protocol allows data to be transferred on the rising and falling edge of the clock so 8-bits (two transfers) are sent every clock cycle. A 50 MHz clock provides a transfer rate of 50 Mbytes/s.
The UHS-II standard changes from the eight pin interface to a pair of low voltage (0.4 V pp), differential signals with an additional set of pins, including matching power and ground. This approach is similar to USB 3 versus USB 2, where the high-speed, differential USB 3 communication is on a new set of pins while the legacy USB 2.0 interface is on the existing set of pins.
The reason for this design maneuver is backward compatibility. It allows a newer socket to handle older cards and it allows a newer card to operate in an older system (albeit more slowly). The normal speed SD cards run at 12.5 Mbytes/s while high-speed cards double that to 25 Mbyte/s. UHS-I runs at 50 Mbyte/s and 104 Mbyte/s. UHS-II can run at 312 Mbytes/s in half duplex mode or 156 Mbyte/s in full duplex mode. In the latter case, the differential pairs are sending in the opposite direction.
Unfortunately the electrical interface is not the only issue when it comes to compatibility. Capacity rears its head because the original specification made certain assumptions limiting the maximum capacity of a device. This is more of an issue with older devices not being able to use or take advantage of larger capacity devices. In general, newer systems can read and write older flash memory cards.
The challenge of embedded developers is that UHS-II is much more complex to implement. SPI and, sometimes, QSPI interfaces are standard on most microcontrollers making interfacing to all but UHS-II devices a matter of device drivers. There are USB to UHS-II adapters which would be one way for a microcontroller to gain access to the higher speed devices. In the meantime, UHS-I appears to be the fastest alternative for embedded developers.
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