Digital ICs/DSP: Build Faster Yet Lower-Power Chips With Memory IP

Addressing the shortcomings of previous blocks of memory intellectual property (IP), the Advantage series of memory IP boosts speed by 40% and reduces power by 50% over most current industry offerings. Developed for use with 90-nm process rules, the memory-IP blocks handle a host of design-for-manufacturability issues, including support for the detection and correction of soft errors. The cells incorporate the company's Flex-Repair redundancy technology and other circuits that open the door to robust memory test and repair subsystem implementation. The memory blocks are fully compatible with the company's widely used integration and qualification standards. Contact the company for licensing terms.