SerDes ICs Enlist Adaptive DSP Noise Cancellation

Oct. 8, 2008
The D-PHY SerDes ICs debut as the first high-speed, physical-layer transceivers to employ digital signal processing techniques to eliminate the noise associated with 5 Gb/s and 10 Gb/s transmissions over backplanes and copper media. This new

The D-PHY SerDes ICs debut as the first high-speed, physical-layer transceivers to employ digital signal processing techniques to eliminate the noise associated with 5 Gb/s and 10 Gb/s transmissions over backplanes and copper media. This new architecture combines the company's WideEye technology, a set of adaptive DSP-based noise-cancellation techniques, with analog signal conditioning. The D-PHY 5G transceivers deliver 1.25 to 6.25 Gb/s transmissions over FR-4 material and two connectors at distances up to 60". It is available in two versions: the D-PHY 4x5G quad transceiver providing full-duplex transmissions up to 25 Gb/s and the D-PHY 2x5G dual transceiver that delivers up to 12.5 Gb/s. Each device also has eight low-speed SerDes links and offers three multiplexing options: 1:1, 2:1, and 4:1. A legacy mode available with 1:1 multiplexing detects connection with another SerDes device, allowing new cards to interface with existing ones. Other shared features include built-in self-test and real-time bit-error-rate monitoring. Available in 260-pin HSBGAs, high-volume prices for the D-PHY 4x5G and D-PHY 2x5G are $49 and $28 each, respectively. ANALOGIX SEMICONDUCTOR INC., Santa Clara, CA. (408) 988-8848.

Company: ANALOGIX SEMICONDUCTOR INC.

Product URL: Click here for more information

About the Author

Staff

Articles, galleries, and recent work by members of Electronic Design's editorial staff.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!