Chip Controls Telecomm Jitter And Signal De-synchronization

May 1, 2002
Specializing in performing jitter attenuation and signal de-synchronization operations in telecomm and datacomm equipment surrounding the edge of optical networks, the M28320/28326/28324 chips employ proprietary low-power digital jitter-attenuation

Specializing in performing jitter attenuation and signal de-synchronization operations in telecomm and datacomm equipment surrounding the edge of optical networks, the M28320/28326/28324 chips employ proprietary low-power digital jitter-attenuation technology (DJAT) that, in replacing existing discrete analog components, is said to provide greater system reliability and faster time-to-market. (These signal timing functions are required by SONET systems as they bring voice and data traffic from high-speed network cores onto lower-speed digital signal (DS3) leased lines.).The 12-port M28320, 6-port M28326 and 4-port M28324 are designed to adapt and fully smooth STS-1 clocks (with overhead gaps) to a network-compliant DS3 line clock. The M28320 can also attenuate E3/STS-1 clock jitter, permitting its use as a customer installation (CI) clock. The DJAT devices are said to produce a clean, de-jittered clock and data output, eliminating the need for VCXOs and other components. The 15 mm x 15 mm, 196-pin PBGAs cost $180 (M28320), $105 (M28326) and $75 (M28324) each/1,000. Reference designs are also available. MINDSPEED TECHNOLOGIES, Newport Beach, CA. (949) 579-3000.

Company: MINDSPEED TECHNOLOGIES

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