Multiprocessor Hits High Performance Control Plane

June 10, 2012
Freescale's latest 64-bit, quad core QorIQ chips target high performance control plane applications.

Network processors have been targeted by a range of processor architectures. Freescale's latest QorIQ chips target high performance control plane applications using a conventional symmetrical multiprocessing (SMP) configuration that is amenable for a variety of applications. The quad core QorIQ P5040 (Fig. 1) and dual core QorIQ P5021 employ Freescale's 2.4 GHz, 64-bit e5500 Power Architecture cores. The cores have access to a low latency memory hierarchy designed for compute-intensive applications. System designers with tight thermal constraints will appreciate the array of power management options and a typical power consumption of less than 22W.

Figure 1. The quad core QorIQ P5040 employs Freescale's 2.4 GHz, 64-bit e5500 Power Architecture cores.

The memory architecture starts with tightly coupled 512 Kbyte L2 caches per core. There is a large 2 Mbyte L3 CPC (CoreNet Platform Cache) that is connected to the CoreNet Coherency Fabric. This in turn supports the dual 64bit DDR3 memory controllers.

These platforms target communication networking environments and include dual frame managers supporting 10G Ethernet or 4 1G Ethernet interfaces. The network interfaces are augmented by a range of hardware accelerators including: the Frame Manager capable of handling parsing, classification and distribution of packets at 24 Gbits/s, a Buffer Manager with 64 buffer pools, a Queue Manager that handles up to 224 queues, and a Security Manager with support for IPSec, SSL, and 1024 bit RSA public key encryption at speeds up to 25K transactions/s. The RAID 5/6 support can be used with storage applications.

Peripheral support is handled by a range of standard interfaces such as USB 2.0, I2C, SPI and GPIO. Three PCI Express Gen 2.0 interfaces provide high speed control. There are a pair of SATA 2.0 interface for local storage.

Freescale's chips have a wide range of software support including a very large collection of third party vendors. The chips can run Freescale's VortiQa software framework that now runs in Linux user space (see Data Plane Software Moves To User Space). User space frameworks provide more flexibility and security with minimal overhead.

The latest addition to the VortiQa suite is the VortiQa Intelligent Traffic Classification and Load Balancing (ITCL) software. The ITCL handles stateful load-balancing of multi-flow application sessions at line rates. It can also handle packet reassembly and passenger packets in tunnels such as VxLANs needed in this type of environment. ITCL supports packet copy for monitoring solutions.

The VortiQa software is designed to scale up and across chips. It runs on the VortiQa Platform Services Package (PSP) that runs in user space.

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.

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I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.  

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