Power-Management Schemes Lower Leakage Currents

Oct. 27, 2005

The SmartReflex adaptive power-management technology lets Texas Instruments' designers craft chips with lower active and standby power levels. Now in place with 90-nm products, it will be especially valuable in reducing idle current leakage as TI's DSP a

Dave Bursky

SmartReflex combines intelligent and adaptive silicon, circuit design approaches, and software designed to solve power-and performance-management challenges at the smaller process nodes. TI can then build chips that consume less active and standby power, so designers can build systems that run longer, dissipate less heat, and are smaller than previously possible.

Some or all of the aspects of the SmartReflex technology can be embedded in a specific chip design. The silicon intellectual property handles power management. Also, the adaptive hardware and software schemes dynamically control voltage, frequency, and power based on device activity, modes of operation, and process and temperature variations.

The company's current OMAP 2 family of application processors includes various aspects of the SmartReflex technology. Future chips will incorporate incrementally more advanced versions of the SmartReflex technology to further reduce power.

Texas Instruments Inc.
www.ti.com

About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.