Standardized DSP/CPU Devices

Sept. 30, 2002
Building an SoC product that combines a DSP and CPU is no easy task. That's why products like TI's OMAP5910 are key to the general use of DSP/CPU architectures. Programming both a DSP and CPU is difficult, but it becomes even harder if communication...

Building an SoC product that combines a DSP and CPU is no easy task. That's why products like TI's OMAP5910 are key to the general use of DSP/CPU architectures. Programming both a DSP and CPU is difficult, but it becomes even harder if communication between the two processors is nonstandard.

The OMAP5910 combines an ARM 925 processor core with a TI TMS320C55x DSP core. It also includes an interprocessor communication system, SDRAM or shared SRAM memory, and four dedicated hardware mailboxes to synchronize data exchanges. Communication between applications on each processor is further enhanced through software support on both sides. The chip has shared and private peripherals to minimize the support chips needed for most applications. A consistent system architecture, interprocessor communication, and a good set of software development tools significantly simplify development.

Other reasons for putting both processors on the same chip include reduced power consumption through better power management. This tends to be more difficult with discrete designs and more complex for custom SoCs. Another benefit of standard dual-processor SoCs is improved debugging. For example, the processor clocks on the OMAP5910 are synchronized so that the pair can be slowed down. There also are hardware breakpoints that can stop both processors, significantly simplifying dual-processor debugging.

See associated figure.

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William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

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