Digital ICs/DSP: Neuron Processors Double Memory And Still Trim Power By 33%

Dec. 4, 2003

A pair of 3.3-V Neuron chips for the LonWorks family delivers up to twice the memory of previous 5-V pin-compatible alternatives yet reduces power consumption by 33%. The CY7C53120L8 and 53150L enable sensors and actuators to be networked and connected to the Internet. An included hardware UART and serial peripheral interface (SPI) can run at up to 2.5 Mbits/s. A programmable low-voltage inhibitor (LVI) on the chips lets customers set voltage trip thresholds that reference the noise level while reducing external components. The devices are compatible with Echelon's power-line and free-topology twisted-pair transceivers. The company's Node-Builder 3.1 Development Tool supports low-power controllers. In lots of 10,000, the CY7C53120L8 and 53150C cost $3.80 and $3.10, respectively.

Cypress Semiconductor Corp.www.cypress.com

About the Author

Dave Bursky

Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.