Audio-Optimized DSP Subsystem Cuts System Design Time

Aug. 4, 2005

Setting its sights on audio and voice applications, the second-generation TeakLite-II DSP core and audio subsystem clocks at speeds of up to 200 MHz. It's based on the TeakLite DSP core, which contains a mix of DSP and control instructions. Dev

Dave Bursky

Developed by CEVA-DSP, TeakLite-II requires just 0.5 mm² when implemented with 130-nm design rules. The small core area and high code density, which are possible thanks to the 16-bit instruction set, keeps system costs low. The subsystem also minimizes power, as the core consumes just 0.1 mA/MHz when running a stereo MP3 decoding algorithm.

The subsystem peripherals that will optimize implementation for audio applications surround the basic DSP core. These peripherals include a cache memory, configurable data and program memories, a three-channel DMA controller, and external interfaces. They add another 1.5 mm² to the core area, bringing the total DSP subsystem to 2 mm².

The external interface options include an ARM high-speed bus (AHB) master interface and an ARM peripheral bus (APB) interface to leverage already designed APB peripherals such as the power-management unit, timers, general-purpose I/Os, and interrupt controller.

The data memory can be configured as 15, 24, or 32 kbytes, while the program memory can be set at 4 or 16 kbytes. Designers can add a tightly coupled memory of up to 4 kbytes to handle time-critical algorithms. Options include interfaces for audio codecs and time-division multiplexed devices.

The combination of the DSP core and peripherals provides a good match to handle audio algorithms from all over the world—MP3, WMA, AAC, HE-AAC/aacPlus, Ogg Vorbis, BSAC, AC3, and DTS. The core readily handles speech/voice codecs such as G.7231.1, G.729, G.726, G.711, G.168, AMR, and WB-AMR. An integrated development environment that extends the CEVA-Audio tools available for previous TeakLite DSP cores lets designers easily develop and debug their applications.

The core/subsystem is now available for licensing. Contact the company for terms.

CEVA-DSPwww.ceva-dsp.com

About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.