DSP Architecture Drives Range Of New Applications

Developed jointly by Intel Corp. and Analog Devices Inc., the new Blackfin architecture is designed to deliver video, image, voice and data communications while also providing integrated control capabilities, a feat that is said to define a new class of DSPs. Features of the Blackfin include dynamic power management, highly parallel computational blocks, high-performance digital signal processing, high code density, video instructions, and hierarchical memory.
Dynamic power management permits context-sensitive control over power consumption. Designers can dynamically vary both the frequency and voltage of operation of the DSP core, resulting in longer battery life for portable appliances.
The heart of the architecture is the data arithmetic unit. It includes two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, and a single 40-bit barrel shifter. Each MAC can perform a 16-bit by 16-bit multiply on four independent data operands every cycle. Blackfin also features two data address generators, which are complex load/store units designed to generate addresses to support sophisticated DSP filtering operations.
Regarding code density, the architecture supports multi-length instructions and can link 16-bit control instructions with 32-bit DSP instructions into 64-bit groups to maximize memory packing. The current generation of the architecture features a dual MAC, 300-MHz core operating at 1.5V to provide high-performance processing and low power consumption. Typical applications are sophisticated voice modems, audio/video capable Internet appliances, and mobile communications devices.