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32-bit Micro Targets Powertrain And More

Nov. 16, 2010
Freescale's new Qorivva line of 32-bit Power Architecture multicore processors are designed to handle a range of automotive designer's needs.

Qorivva MPC564x block diagram

Freescale is looking to expands its support for the automotive space with the new Freescale Qorivva line. This 32-bit Power Architecture microcontroller (Fig. 1) line starts out with the Qorivva MPC564xA microcontroller. The multicore line is based on Freescale's 55nm technology and runs at speeds up to 300 MHz. It includes the MPC55xx and MPC56xx lines.

The family targets automotive applications such as power train, safety/chassis, body electronics and security. Infotainment is left to other Freescale microcontroller families such as those based on the Arm architecture. The chips support communication interfaces such as Ethernet, CAN and Flexray.

The MPC564xA with an e200 core runs at 150 MHz and can execute two instructions per cycle. Its memory includes ECC support. There is 4 Mbytes of flash and 192 Kbytes of SRAM. 32 Kbytes of SRAM can be placed in standby mode. The chip has three FlexCAN controllers with 64 message buffers. It also has a FlexRay module. For debugging the chip has JTAG and Nexus support.

The dual core MPC5668G is designed for gateway applications. It has FlexCAN and 10/100 BaseT Ethernet support. As with most other chips in the family, the MPC5668G includes peripherals such as SPI, I2C, and SCI. it also has a 36-channel, 10-bit ADC.

Freescale expects this family to follow the QoriQ but with a more automotive bent. Obviously more rugged chips are required but the multicore and software support will be similar. The Qorivva line includes runtime support for AUTOSAR MCAL driver suites and the AUTOSAR RTOS.

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William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

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