Altivec Amps Up Latest QorIQ Multicore Chips

June 23, 2011

Freescale's new, high end QorIQ AMP line brings a horde of new features including the return of the Altivec vector processing plus a robust multithreaded architecture.

William G. Wong

1 of Enlarge image

T4240 with 12 cores and Altivec support

Freescale new, high end QorIQ AMP line brings a horde of new features including the return of the Altivec vector processing plus a robust multithreaded architecture. The architecture is based on the new, 2 GHz, 64-bit e6500 vCore with 12 cores in the T4240 (Fig. 1). Each core is dual threaded so the T4240 supports 24 threads. Each core also has its own Altivec support.

Freescale's new AMP (advanced multiprocessing) series is built on 28nm technology. The dual threaded cores are transistor heavy delivering 1.7x performance, more than the typical hyperthreaded core that gets about a 1.3x boost. Power efficiency cuts requirements in half while still delivering 5x computational improvements.

The e6500 vCores support hardware virtualization. The Altivec support has been enhanced but it is binary compatible with prior Altivec implementations. Altivec's resurgence is in response to customer demand as well as Intel's competing Advanced Vector Extensions (see Intel's AVX Scales To 1024 bit Vector Math). Intel has laid out a roadmap for AVX but Freescale tends to hold their long term plans a bit tighter to the chest.

Freescale has also found Altivec to be useful for networking applications. In particular, a portion of their cellular scheduling algorithms can take advantage of Altivec. The QoriIQ line targets mobile base stations so this is a key advantage that complements the other hardware acceleration designed for networking. These accelerators include security, pattern matching, compress/decompress, and data center support. These were part of the prior generation with the appropriate improvements in the AMP series.

At the center is Freescale's CoreNet Coherency Fabric and CoreNet Cache system. The cores have L1 and L2 caches and a shared L3 cache extends to the accelerators. Up to four DDR3 memory controllers feed the caches.

The QorIQ line supports PCI Express, Serial RapidIO (SRIO) and Ethernet. SRIO is critical in the target markets of military, avionics and communications. IDT's new SRIO to PCI Express bridge bring Intel's chips into this realm (see Innovative Platforms Enlist To Serve High-Performance Military Computing) so having SRIO on-board can be a big advantage.

Also, check out the QorIQ AMP video interview on Engineering TV.

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.

You can send press releases for new products for possible coverage on the website. I am also interested in receiving contributed articles for publishing on our website. Use our template and send to me along with a signed release form.

Check out my blog, AltEmbedded on Electronic Design, as well as his latest articles on this site that are listed below.

You can visit my social media via these links:

I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.

I still get a hand on software and electronic hardware. Some of this can be found on our Kit Close-Up video series. You can also see me on many of our TechXchange Talk videos. I am interested in a range of projects from robotics to artificial intelligence.