Heterogeneous Multicore Targets The Cloud

Nov. 19, 2012
Texas Instrument's Keystone system-on-chip family now includes high performance computing support with up to four Cortex-A15 and eight C66x DSP cores.

Texas Instrument's Keystone system-on-chip (SoC) processors are used for a wide variety of applications include radios (see DSP Chips Form Ideal Foundation For White Space Radios). The latest additions to the family address high performance processing chores by mixing Cortex-A15 and C66x DSP cores. At the top end of the spectrum is the 66AK2H12 (Fig. 1) that packs in four, 1.5 GHz Cortex-A15 cores and eight, 1.2 GHz C66x DSP cores. The Cortex-A15s tackle chores such as network management while the DSP cores do the heavy lifting for applications such as video analytics and multimedia processing. The platforms can also be used for high performance computing (HPC) applications especially those utilizing DSP algorithms.

Figure 1. The 66AK2H12 packs in four, 1.5 GHz Cortex-A15 cores and eight, 1.2 GHz C66x DSP cores.

TI has doubled the interconnect bandwidth on the Arm side with a 256-bit data path. It also doubles the interface clock rate.

The 66AK2H06 pares down the number of cores to a pair of Cortex-A15 cores and four C66x cores. This chip targets lower end applications where more computing power is not required and lower power is a plus.

Enterprise and industrial applications may benefit from the 66AK2E05 that has four Cortex-A15s and one C66x while the 66AK2E02 has one of each type of core. The former can handle more robust networking and general processor jobs with occasional offloading to the single DSP. Applications such as cloud computing that do not require heavy duty DSP processing can be addressed by the AM5K2E04 with four Cortex-A15 cores or the dual core version, the AM5K2E02.

All the chips share the same basic architecure including the central TeraNet fabric that link the cores to memory controllers, accelerators and peripherals. The high end chips support dual DDR3/3L 64-/72-bit memory controllers while the others have a single controller. The Arm cores share a common L2 cache while the D66x cores will have dedicated L2 caches. The memory controllers add an L3 cache shared by all cores.

TI has paired the cores with impressive networking support including and 10G Ethernet ports and a 1/10 G Ethernet switch. The Packet AccelerationPac can handle packet processing at speeds up to 8.4 Gbits/s. The Security AccelerationPac can handle crypto chores at speeds up to 2.8 Gbits/s. The top end offerings also support Serial Rapid IO.

Other high performance peripherals on the chip include PCI Express, USB 3.0 and Hyperlink. Hyperlink is TI's chip interconnect that is also found on earlier TI offerings. The chips also have the usual complement of serial ports, I2C and SPI interfaces.

The earlier Keystone chips target radio applications such as wireless base stations. The new chips can work in this area as well but the variety of configurations allow them to be used in a host of other environments as well. They readily support standard programming infrastructures such as OpenMP and OpenCL.

Texas Instruments has delivered a major computing platform that addresses a wide variety of applications. Combing the Arm Cortex-A15 with the C66x cores delivers high performance while keeping power requirements low. The chips provide a familiar SMP programming environment. They support standard software offerings such as Linux and SYS/BIOS for the DSP side.

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

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