Researcher pursues bottom-up approach to semiconductor miniaturization

Semiconductor miniaturization efforts have thus far centered on top-down approaches, in which a silicon wafer is etched using micro- or nanolithography techniques. Although such techniques continue to predominate, advances such as the perfection of extreme ultraviolet (EUV) lithography will need to be achieved.

The challenges facing EUV were highlighted last summer when Intel committed approximately $1.0 billion to EUV pioneer ASML's research and development programs to accelerate the deployment of 450-mm wafer technology and EUV lithography by as much as two years.

If top-down approaches lag, a bottom-up approach may provide an assist. University of South Carolina researcher Chuanbing Tang is pursuing such an approach. As a chemist, Tang, an assistant professor in the department of chemistry and biochemistry in USC’s College of Arts and Sciences, works with the individual molecules that go onto a surface, coaxing them to self-arrange into the patterns needed.

Tang’s laboratory has published a paper for the special “Emerging Investigators 2013” issue of the journal Chemical Communications.

Tang doesn't expect top-down approaches to disappear. “The industry won’t replace top-down methods,” Tang said, as reported at Newswise, “but they plan to use bottom-up together with the existing top-down methods soon.”

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