8-Bit MCU Runs 1 Instruction Per Clock Cycle

With 60 kbytes of SuperFlash memory and various interfaces for serial communications, the Toshiba TMP89FS60UG/FG 8-bit general-purpose microcontroller is the first product based on the company's TLCS-870/C1 core. The core processes one instruction cycle per clock cycle, enabling faster processing at lower frequencies, reduced noise, and lower power consumption compared to the previous-generation core. The MCU also integrates a 10-bit, 16-channel analog-to-digital converter and analog IP blocks that provide voltage-level detection and power-on reset functions.

The device's on-chip debugger enhances development efficiency by enabling software-version upgrades in the field as well as debugging on mass-production boards. The core is binary compatible with previous Toshiba 8-bit MCU cores, so designers can use existing software resources. When used in conjunction with a Toshiba C complier, developers can achieve high code efficiency. The chip runs at 8 MHz on a 4.5- to 5.5-V supply and at 4.2 MHz on a 2.7- to 5.5-V supply. It includes a 3-kbyte internal RAM and 56 I/O ports. The TMP89FS60UG comes in a 64-pin plastic PQFP 10- by 10-mm package with 0.5-mm pitch, while the TMP89FS60FG comes in a 64-pin plastic QFP 14- by 14-mm package with 0.8-mm pitch.

Samples of TMP89FS60UG/FG are available now and volume production is scheduled for this quarter. The MCU costs $4.50 each in 10,000-piece quantities. Check out www.chips.toshiba.com.