Low-Power FPGAs Put SRAM Into Small Package

June 1, 2004
To meet consumer requirements for feature-rich, small, and lightweight mobile wireless devices, chip vendors have had to increase the density of their packages. One example is the low-power, high-density programmable-logic devices that were recently...

To meet consumer requirements for feature-rich, small, and lightweight mobile wireless devices, chip vendors have had to increase the density of their packages. One example is the low-power, high-density programmable-logic devices that were recently announced by QuickLogic: the QL8025 and QL8050. Both chips are part of the Eclipse II micro-Watt FPGA product family.

The QL8025 has 47,000 logic gates, whereas the QL8050 has 64,000. Both devices include embedded dual-port SRAM and extended I/O support. These features allow several board-level components to be integrated into a single chip.

The Eclipse II family offers alternatives to typical FPGA, CPLD, DSP, and ASIC designs. These alternatives support the development of applications that demand ultra-low power consumption, small-form-factor packaging, and high design security protection from IP theft. The company claims that its product family has much lower power consumption than other technologies. It also boasts dynamic power dissipation of less than 50 mW at 100 MHz.

The products' target applications are any battery-powered or heat-sensitive products. Examples include portable handheld products like PDAs, bar-code readers, and handheld scanners and gaming modules. Among the family's other applications are portable medical equipment and wireless add-on products.

The Eclipse II FPGA family is supported in QuickWorks version 9.6. It is available for download from www.quicklogic.com/software_download. QuickLogic also offers intellectual-property blocks for Eclipse II FPGAs. They include PCI, memory interfaces, SDRAM, DSP, and other commonly used peripheral functions.

The Eclipse II FPGA family of devices starts at $3.50 in high-volume quantities.

QuickLogic Corp.1277 Orleans Dr., Sunnyvale, CA 94089-1138; (408) 990-4000, FAX: (408) 990-4040, www.quicklogic.com.
About the Author

John Blyler

John Blyler has more than 18 years of technical experience in systems engineering and program management. His systems engineering (hardware and software) background encompasses industrial (GenRad Corp, Wacker Siltronics, Westinghouse, Grumman and Rockwell Intern.), government R&D (DoD-China Lake) and university (Idaho State Univ, Portland State Univ, and Oregon State Univ) environments. John is currently the senior technology editor for Penton Media’s Wireless Systems Design (WSD) magazine. He is also the executive editor for the WSD Update e-Newsletter.

Mr. Blyler has co-authored an IEEE Press (1998) book on computer systems engineering entitled: ""What's Size Got To Do With It: Understanding Computer Systems."" Until just recently, he wrote a regular column for the IEEE I&M magazine. John continues to develop and teach web-based, graduate-level systems engineering courses on a part-time basis for Portland State University.

John holds a BS in Engineering Physics from Oregon State University (1982) and an MS in Electronic Engineering from California State University, Northridge (1991).

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