In one integrated environment, designers can now implement gigabit serial interfaces in high-speed printed-circuit-board (PCB) systems. Version 15.0 of Cadence's packaging design environment includes enhancements that span the entire design flow, ranging from chip to package to board.
With many manufacturers exploiting system-in-package technology to reduce product footprints, design of integral die stacks becomes critical. A new multiple stacked-die design and editing environment in the Cadence Advanced Package Designer, along with an automatic wirebond creation capability, speeds the design process.
New capabilities in PCB Librarian 15.0 address bottlenecks stemming from the manual creation, entry, and validation of component data for devices with large pin counts in today's designs. This release uses XML for data-driven symbol generation, management, and portability. It also can import pin and package data directly from online datasheets in .pdf or .csv formats.
Outer-layer ground planes are pervasive in complex, high-speed PCBs. The Allegro 15.0 layout tool addresses this with a real-time copper-pour capability that allows for dynamic plowing and healing during interactive or automatic routing. This helps cut design time by eliminating shape change-and-fix iterations. It also allows shapes to be edited at any time.
The SpecctraQuest Signal Integrity Expert now includes a Spice-to-IBIS model integrity module that helps users quickly create IBIS models from Spice models.
Pricing starts at $4000/year for PCB Design Studio, $26,000/year for PCB Design Expert, and $24,200 for the SpecctraQuest Signal Integrity Expert tool. All are supported on Solaris, HP-UX, and IBM-AIX platforms, as well as Windows 2000 and XP Pro.
Cadence Design Systemswww.cadence.com
