Digital ICs/DSP: Clock-Driver PLL And Address-Bus Register ICs Make DIMM Designs Easy

May 26, 2005

Able to support 667-MHz registered dual-in-line memory modules (DIMMs), a phase-locked loop (PLL) clock driver, a register, and the industry's only DDR2 667-MHz register validation board (RVB) allow designers to rapidly develop DIMM solutions. The PLL requires no external components. It's optimized for very low phase error, minimal dynamic phase offset, static phase offset, low skew, and jitter. The register chip drives the address signals and supports 1:1 (25-bit) and 1:2 (14-bit) bus options. The register consumes little power during standby and includes proprietary output-edge-control logic to minimize switching noise with unterminated lines. The PLL and register chips sell for $2.33 each in 10,000-unit quantities and are available in Green BGA packages. The RVB is sold by CST Inc. (www.simmtester.com) but was developed by IDT.

Integrated Device Technology Inc.www.idt.com

About the Author

Dave Bursky | Technologist

Dave Bursky, the founder of New Ideas in Communications, a publication website featuring the blog column Chipnastics – the Art and Science of Chip Design. He is also president of PRN Engineering, a technical writing and market consulting company. Prior to these organizations, he spent about a dozen years as a contributing editor to Chip Design magazine. Concurrent with Chip Design, he was also the technical editorial manager at Maxim Integrated Products, and prior to Maxim, Dave spent over 35 years working as an engineer for the U.S. Army Electronics Command and an editor with Electronic Design Magazine.