Popular FPGAs Support DDR2 Data Rates

March 21, 2006
Recently announced, the Stratix II FPGA family is qualified to support the 667-Mb/s DDR2 SDRAM interface data rate, the fruit of Altera's auto-calibrating PHY memory interface controller intellectual property core. The Stratix II devices are intended

Recently announced, the Stratix II FPGA family is qualified to support the 667-Mb/s DDR2 SDRAM interface data rate, the fruit of Altera's auto-calibrating PHY memory interface controller intellectual property core. The Stratix II devices are intended for use in conjunction with Micron Technology's 667-Mb/s DDR2 SDRAM modules. Support for interfacing the FPGAs with SDRAM includes technical documentation, software and tool support, IP cores, demonstration boards, characterization reports, and simulation models. A customer engagement program, offering users the opportunity to work with the company in advance of the release of the DDR2 SDRAM interface is available. For more details, call ALTERA CORP., San Jose, CA. (408) 544-7000.

Company: ALTERA CORP.

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